{"title":"Charge Balance Design of 1200-V E-Mode p-GaN Gate HEMT Toward Enhanced Breakdown Voltage and Dynamic Stability","authors":"Junjie Yang;Jingjing Yu;Jiawei Cui;Sihang Liu;Teng Li;Yunhong Lao;Hao Chang;Maojun Wang;Jinyan Wang;Xiaosen Liu;Jin Wei;Bo Shen","doi":"10.1109/LED.2025.3539353","DOIUrl":null,"url":null,"abstract":"This work investigates the charge balance design of the 1200-V E-mode lateral superjunction p-GaN gate HEMT (SJ-HEMT) on sapphire substrate. The charge balance is formed through the alternative p-/n-pillars; the p-pillars are thinned p-GaN stripes, and the n-pillars are 2DEG stripes. The charge balance design on the static and dynamic performance of the SJ-HEMT was investigated by tuning the width of p-/n-pillars. The SJ-HEMT with charge balance yields a BV of 2655 V and a high BV/<inline-formula> <tex-math>${L}_{\\text {GD}}$ </tex-math></inline-formula> ratio of 1.56 MV/cm. Notably, the SJ-HEMT demonstrates effective suppression of trapping effects, which exhibits a strong correlation with the gap between two p-pillars. At charge balance design, the SJ-HEMT presents an excellent dynamic <inline-formula> <tex-math>${R}_{\\text {ON}}$ </tex-math></inline-formula>/static <inline-formula> <tex-math>${R}_{\\text {ON}}$ </tex-math></inline-formula> ratio of 1.28 under <inline-formula> <tex-math>${V}_{\\text {DS}}$ </tex-math></inline-formula> stress up to 1200 V. Our study also indicates a scaling of p-/n-pillars can further improve the dynamic <inline-formula> <tex-math>${R}_{\\text {ON}}$ </tex-math></inline-formula> performance. This work underscores the merits of charge-balanced design for high-performance 1200-V E-mode GaN power transistors.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 4","pages":"636-639"},"PeriodicalIF":4.1000,"publicationDate":"2025-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10876162/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This work investigates the charge balance design of the 1200-V E-mode lateral superjunction p-GaN gate HEMT (SJ-HEMT) on sapphire substrate. The charge balance is formed through the alternative p-/n-pillars; the p-pillars are thinned p-GaN stripes, and the n-pillars are 2DEG stripes. The charge balance design on the static and dynamic performance of the SJ-HEMT was investigated by tuning the width of p-/n-pillars. The SJ-HEMT with charge balance yields a BV of 2655 V and a high BV/${L}_{\text {GD}}$ ratio of 1.56 MV/cm. Notably, the SJ-HEMT demonstrates effective suppression of trapping effects, which exhibits a strong correlation with the gap between two p-pillars. At charge balance design, the SJ-HEMT presents an excellent dynamic ${R}_{\text {ON}}$ /static ${R}_{\text {ON}}$ ratio of 1.28 under ${V}_{\text {DS}}$ stress up to 1200 V. Our study also indicates a scaling of p-/n-pillars can further improve the dynamic ${R}_{\text {ON}}$ performance. This work underscores the merits of charge-balanced design for high-performance 1200-V E-mode GaN power transistors.
期刊介绍:
IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.