Charge Balance Design of 1200-V E-Mode p-GaN Gate HEMT Toward Enhanced Breakdown Voltage and Dynamic Stability

IF 4.1 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Junjie Yang;Jingjing Yu;Jiawei Cui;Sihang Liu;Teng Li;Yunhong Lao;Hao Chang;Maojun Wang;Jinyan Wang;Xiaosen Liu;Jin Wei;Bo Shen
{"title":"Charge Balance Design of 1200-V E-Mode p-GaN Gate HEMT Toward Enhanced Breakdown Voltage and Dynamic Stability","authors":"Junjie Yang;Jingjing Yu;Jiawei Cui;Sihang Liu;Teng Li;Yunhong Lao;Hao Chang;Maojun Wang;Jinyan Wang;Xiaosen Liu;Jin Wei;Bo Shen","doi":"10.1109/LED.2025.3539353","DOIUrl":null,"url":null,"abstract":"This work investigates the charge balance design of the 1200-V E-mode lateral superjunction p-GaN gate HEMT (SJ-HEMT) on sapphire substrate. The charge balance is formed through the alternative p-/n-pillars; the p-pillars are thinned p-GaN stripes, and the n-pillars are 2DEG stripes. The charge balance design on the static and dynamic performance of the SJ-HEMT was investigated by tuning the width of p-/n-pillars. The SJ-HEMT with charge balance yields a BV of 2655 V and a high BV/<inline-formula> <tex-math>${L}_{\\text {GD}}$ </tex-math></inline-formula> ratio of 1.56 MV/cm. Notably, the SJ-HEMT demonstrates effective suppression of trapping effects, which exhibits a strong correlation with the gap between two p-pillars. At charge balance design, the SJ-HEMT presents an excellent dynamic <inline-formula> <tex-math>${R}_{\\text {ON}}$ </tex-math></inline-formula>/static <inline-formula> <tex-math>${R}_{\\text {ON}}$ </tex-math></inline-formula> ratio of 1.28 under <inline-formula> <tex-math>${V}_{\\text {DS}}$ </tex-math></inline-formula> stress up to 1200 V. Our study also indicates a scaling of p-/n-pillars can further improve the dynamic <inline-formula> <tex-math>${R}_{\\text {ON}}$ </tex-math></inline-formula> performance. This work underscores the merits of charge-balanced design for high-performance 1200-V E-mode GaN power transistors.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 4","pages":"636-639"},"PeriodicalIF":4.1000,"publicationDate":"2025-02-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10876162/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

This work investigates the charge balance design of the 1200-V E-mode lateral superjunction p-GaN gate HEMT (SJ-HEMT) on sapphire substrate. The charge balance is formed through the alternative p-/n-pillars; the p-pillars are thinned p-GaN stripes, and the n-pillars are 2DEG stripes. The charge balance design on the static and dynamic performance of the SJ-HEMT was investigated by tuning the width of p-/n-pillars. The SJ-HEMT with charge balance yields a BV of 2655 V and a high BV/ ${L}_{\text {GD}}$ ratio of 1.56 MV/cm. Notably, the SJ-HEMT demonstrates effective suppression of trapping effects, which exhibits a strong correlation with the gap between two p-pillars. At charge balance design, the SJ-HEMT presents an excellent dynamic ${R}_{\text {ON}}$ /static ${R}_{\text {ON}}$ ratio of 1.28 under ${V}_{\text {DS}}$ stress up to 1200 V. Our study also indicates a scaling of p-/n-pillars can further improve the dynamic ${R}_{\text {ON}}$ performance. This work underscores the merits of charge-balanced design for high-performance 1200-V E-mode GaN power transistors.
面向提高击穿电压和动态稳定性的1200 v e模p-GaN栅极HEMT电荷平衡设计
本文研究了蓝宝石衬底上1200 ve模横向超结p-GaN栅极HEMT (SJ-HEMT)的电荷平衡设计。电荷平衡通过交替的p-/n柱形成;p柱为变薄的p-GaN条纹,n柱为2DEG条纹。通过调整p柱/n柱的宽度,研究了电荷平衡设计对SJ-HEMT静态和动态性能的影响。具有电荷平衡的SJ-HEMT的BV为2655 V, BV/ ${L}_{\text {GD}}$比值高达1.56 MV/cm。值得注意的是,SJ-HEMT有效地抑制了俘获效应,这与两p柱之间的间隙有很强的相关性。在电荷平衡设计中,SJ-HEMT在高达1200v的${V}_{\text {DS}}$应力下呈现出良好的动态${R}_{\text {ON}}$ /静态${R}_{\text {ON}}$比值为1.28。我们的研究还表明,p-/n-柱的缩放可以进一步提高动态${R}_{\text {ON}}$的性能。这项工作强调了高性能1200 v e模GaN功率晶体管的电荷平衡设计的优点。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
IEEE Electron Device Letters
IEEE Electron Device Letters 工程技术-工程:电子与电气
CiteScore
8.20
自引率
10.20%
发文量
551
审稿时长
1.4 months
期刊介绍: IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信