Design and verification of silicon bridge in 2.5D advanced package based on universal chiplet interconnect express (UCIe)

IF 1.6 4区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Reliability Pub Date : 2025-03-26 DOI:10.1016/j.microrel.2025.115710

Yuxuan Fan , Yunyan Zhou , Qidong Wang , Bo Lei , Gang Song , Wenwen Zhang , Hanchen Gan

{"title":"Design and verification of silicon bridge in 2.5D advanced package based on universal chiplet interconnect express (UCIe)","authors":"Yuxuan Fan , Yunyan Zhou , Qidong Wang , Bo Lei , Gang Song , Wenwen Zhang , Hanchen Gan","doi":"10.1016/j.microrel.2025.115710","DOIUrl":null,"url":null,"abstract":"<div><div>This paper presents the design and verification of an embedded silicon bridge interconnect structure for 2.5D advanced packaging based on the Universal Chiplet Interconnect Express (UCIe). To enable high-speed, low-latency communication between chiplets, various routing patterns and transmission structures were explored. Layouts and test vehicles were designed with bump pitches of 45 μm and 55 μm and underwent fabrication for validation. Test results indicate that the silicon bridge demonstrates excellent signal integrity (SI) at a transmission rate of 32 Gbps, with S-parameter, Voltage Transfer Function (VTF) and eye diagram test results all meeting UCIe specifications for advanced packaging, highlighting the feasibility of this interconnect structure for high-density integration and high-speed transmission. This research provides a viable design and manufacturing solution for UCIe-based chiplet interconnects and validates the potential of embedded silicon bridges in heterogeneous integration applications.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"168 ","pages":"Article 115710"},"PeriodicalIF":1.6000,"publicationDate":"2025-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Reliability","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0026271425001234","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

Abstract

This paper presents the design and verification of an embedded silicon bridge interconnect structure for 2.5D advanced packaging based on the Universal Chiplet Interconnect Express (UCIe). To enable high-speed, low-latency communication between chiplets, various routing patterns and transmission structures were explored. Layouts and test vehicles were designed with bump pitches of 45 μm and 55 μm and underwent fabrication for validation. Test results indicate that the silicon bridge demonstrates excellent signal integrity (SI) at a transmission rate of 32 Gbps, with S-parameter, Voltage Transfer Function (VTF) and eye diagram test results all meeting UCIe specifications for advanced packaging, highlighting the feasibility of this interconnect structure for high-density integration and high-speed transmission. This research provides a viable design and manufacturing solution for UCIe-based chiplet interconnects and validates the potential of embedded silicon bridges in heterogeneous integration applications.

Abstract Image

查看原文本刊更多论文

求助全文

约1分钟内获得全文求助全文

来源期刊

Microelectronics Reliability 工程技术-工程：电子与电气

CiteScore

3.30

自引率

12.50%

发文量

342

审稿时长

68 days

期刊介绍： Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged. Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.