Jelle H. T. Bakker;Marcin Ł. Motycki;Raymond J. E. Hueting;Anne-Johan Annema;Mark S. Oude Alink
{"title":"Electrical and 850 nm Optical Characterization of Back-Gate Controlled 22 nm FDSOI PIN-Diodes Without Front-Gate","authors":"Jelle H. T. Bakker;Marcin Ł. Motycki;Raymond J. E. Hueting;Anne-Johan Annema;Mark S. Oude Alink","doi":"10.1109/JEDS.2025.3537290","DOIUrl":null,"url":null,"abstract":"We present electrical and optical <inline-formula> <tex-math>$(\\lambda =\\rm {850~nm })$ </tex-math></inline-formula> measurement results of back-gate controlled SOI PIN-diodes without a front-gate, with an intrinsic Si film thickness of only <inline-formula> <tex-math>${\\sim }\\rm 6nm $ </tex-math></inline-formula>. These ultrathin-body PIN-diodes were fabricated as exploratory devices in a commercially available Fully-Depleted Silicon-On-Insulator (FDSOI) technology, without requiring additional process steps. We show that electrostatic back-gate tuning significantly affects the electrical characteristics and optical responsivity <inline-formula> <tex-math>$({{R_{\\mathrm { o}}}{}})$ </tex-math></inline-formula>. This leads to a novel method to extract the optimal back-gate bias for maximum <inline-formula> <tex-math>${R_{\\mathrm { o}}}{}$ </tex-math></inline-formula> from electrical measurements. The maximal measured <inline-formula> <tex-math>${R_{\\mathrm { o}}}{}$ </tex-math></inline-formula> at 0V bias across the diode and with optimal back-gate bias equals <inline-formula> <tex-math>$62{\\mu }$ </tex-math></inline-formula>A /W, with a -3dB bandwidth of 5.9GHz, and a -6dB bandwidth of 15GHz. These PIN-diodes potentially open the way to new (THz) circuits, sensors, novel/complementary process control monitoring structures, and optical applications. They also enable interaction between the hybrid (bulk) and SOI devices, which is a unique feature of FDSOI technologies.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"190-199"},"PeriodicalIF":2.0000,"publicationDate":"2025-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10859268","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of the Electron Devices Society","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10859268/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
We present electrical and optical $(\lambda =\rm {850~nm })$ measurement results of back-gate controlled SOI PIN-diodes without a front-gate, with an intrinsic Si film thickness of only ${\sim }\rm 6nm $ . These ultrathin-body PIN-diodes were fabricated as exploratory devices in a commercially available Fully-Depleted Silicon-On-Insulator (FDSOI) technology, without requiring additional process steps. We show that electrostatic back-gate tuning significantly affects the electrical characteristics and optical responsivity $({{R_{\mathrm { o}}}{}})$ . This leads to a novel method to extract the optimal back-gate bias for maximum ${R_{\mathrm { o}}}{}$ from electrical measurements. The maximal measured ${R_{\mathrm { o}}}{}$ at 0V bias across the diode and with optimal back-gate bias equals $62{\mu }$ A /W, with a -3dB bandwidth of 5.9GHz, and a -6dB bandwidth of 15GHz. These PIN-diodes potentially open the way to new (THz) circuits, sensors, novel/complementary process control monitoring structures, and optical applications. They also enable interaction between the hybrid (bulk) and SOI devices, which is a unique feature of FDSOI technologies.
期刊介绍:
The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.