{"title":"Localization of heavy doping missing defect in MOSFET by the combined use of nanoprobing analysis and SCM technique","authors":"Shijun Zheng , Xiangdong Wang , Yi Che","doi":"10.1016/j.microrel.2025.115707","DOIUrl":null,"url":null,"abstract":"<div><div>The paper demonstrates an effective flow to localize heavy doping missing defect accurately in failed metal-oxide-semiconductor field-effect transistor (MOSFET). It is commonly known that it is not feasible to localize rare doping anomaly and further visualize the corresponding less doped regions in MOSFET relying on ordinary transmission electron microscopy (TEM) analysis since the dopant distribution is not detectable for TEM. Nevertheless, we found that this kind of defect can be isolated by the combined use of nanoprobing analysis and scanning capacitance microscopy (SCM) technique. The combinational solution was rarely reported before. Nanoprobing analysis of transfer characteristic of failed MOSFET confirms the on-state current drop by two orders of magnitude. Next, the contacting state at source and drain region of MOSFET is examined. Current-voltage (I-V) characteristic of source and drain p-n junctions indicates that high contact resistance comes from metal-semiconductor interface change from ohmic contact to rectifying contact unexpectedly. Eventually, intensive analysis of SCM data proves that tungsten plugs touch lightly doped silicon so that the outcome leads to the formation of Schottky junction that owns rectifying I-V characteristic. In contrast, the tungsten plug touching heavily doped silicon produces ohmic contact, so it keeps normal I-V characteristic of p-n junction. Energy-band theory explains that I-V characteristic of metal-semiconductor interface is closely related to doping concentration in silicon since it determines the potential barrier width at interface where mobile carrier transport phenomenon occurs. The potential barrier width increases as the doping concentration decreases in the silicon side of the interface. We conclude that lack of heavy doping in MOSFET source and drain areas is responsible for high contact resistance. In the article, we present several practical examples to show accurate localization of heavy doping missing defect in different PMOS and NMOS. Furthermore, unwanted over-etching of tungsten plug hole caused MOSFET failure is also studied since it looks quite like heavy doping missing induced electrical fault. Our study promotes the understanding of failure mechanism about heavy doping missing defect in MOSFET of diverse mainstream technology nodes.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"168 ","pages":"Article 115707"},"PeriodicalIF":1.6000,"publicationDate":"2025-03-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Reliability","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0026271425001209","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
The paper demonstrates an effective flow to localize heavy doping missing defect accurately in failed metal-oxide-semiconductor field-effect transistor (MOSFET). It is commonly known that it is not feasible to localize rare doping anomaly and further visualize the corresponding less doped regions in MOSFET relying on ordinary transmission electron microscopy (TEM) analysis since the dopant distribution is not detectable for TEM. Nevertheless, we found that this kind of defect can be isolated by the combined use of nanoprobing analysis and scanning capacitance microscopy (SCM) technique. The combinational solution was rarely reported before. Nanoprobing analysis of transfer characteristic of failed MOSFET confirms the on-state current drop by two orders of magnitude. Next, the contacting state at source and drain region of MOSFET is examined. Current-voltage (I-V) characteristic of source and drain p-n junctions indicates that high contact resistance comes from metal-semiconductor interface change from ohmic contact to rectifying contact unexpectedly. Eventually, intensive analysis of SCM data proves that tungsten plugs touch lightly doped silicon so that the outcome leads to the formation of Schottky junction that owns rectifying I-V characteristic. In contrast, the tungsten plug touching heavily doped silicon produces ohmic contact, so it keeps normal I-V characteristic of p-n junction. Energy-band theory explains that I-V characteristic of metal-semiconductor interface is closely related to doping concentration in silicon since it determines the potential barrier width at interface where mobile carrier transport phenomenon occurs. The potential barrier width increases as the doping concentration decreases in the silicon side of the interface. We conclude that lack of heavy doping in MOSFET source and drain areas is responsible for high contact resistance. In the article, we present several practical examples to show accurate localization of heavy doping missing defect in different PMOS and NMOS. Furthermore, unwanted over-etching of tungsten plug hole caused MOSFET failure is also studied since it looks quite like heavy doping missing induced electrical fault. Our study promotes the understanding of failure mechanism about heavy doping missing defect in MOSFET of diverse mainstream technology nodes.
期刊介绍:
Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged.
Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.