Gate lifetime investigation at low temperature for p-GaN HEMT

Abstract

This paper investigates the time-dependent gate degradation of Schottky-type p-GaN gate transistors by the application of constant electrical stress until the breakdown of the device, indicated by a sudden increase in the gate leakage current. Tests are performed at voltage levels outside the datasheet limits to accelerate the occurrence of failure. To understand the impact of temperature on the failure mechanism, tests encompass temperature ranges from −55 °C to 80 °C, within datasheet recommendations. Results demonstrate that the lower the temperature, the shorter the lifetime, indicating a negative activation energy. Results also present a non-constant activation energy within the range of tested temperatures, demonstrating a complex temperature dependence of the failure mechanism that might not be unique over this temperature range. A very low lifetime of only one day was estimated at −55 °C at the nominal datasheet voltage. The validity of the projection was experimentally confirmed. This underlines the importance of further investigating the gate behavior at low temperatures, as it could be critical for certain applications. Additionally, this challenges the standard gate reliability tests typically performed at the maximum temperature rating of the device, which do not appear to represent the worst-case condition for the gate lifetime.