System in package: Advanced FA techniques to minimize analysis time and cost

IF 1.6 4区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Reliability Pub Date : 2025-03-06 DOI:10.1016/j.microrel.2025.115675

K. Szász, D. Luca

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引用次数: 0

Abstract

Over the years packaging types of semiconductor devices have continued to evolve. One of the more complex package types in the Renesas portfolio is the System in Package or SIP. The SIP package presented in this paper features copper pillars, a three Cu layer substrate, passive components, it is overmolded and has a thin, exposed die. The large number of interfaces and components can lead to numerous potential failure locations. The failures addressed in this study are a result of humidity-related qualification processes. Due to the intricacies of the SIP package, following the failure analysis (FA) procedure of standard integrated circuit packages the analysis was fully destructive. These investigations were not only labour-intensive but also costly and could last up to a period of 2–3 weeks. As a result, an altogether new failure analysis approach, adjusted to the complexities of SiP packages was necessary to improve efficiency and accuracy.

In this case study, an innovative FA workflow is proposed, that includes advanced techniques including Lock-In Thermography and Computed Tomography scans. With the implementation of these methods, the analysis duration and cost were significantly reduced without compromising diagnostic accuracy. This work demonstrates the necessity of adapting FA methodologies to address the unique challenges of advanced packaging systems.

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系统封装：先进的FA技术，最大限度地减少分析时间和成本

多年来，半导体器件的封装类型不断发展。瑞萨电子产品组合中比较复杂的封装类型之一是系统封装或SIP。本文提出的SIP封装具有铜柱，三铜层衬底，无源元件，覆盖成型并具有薄的外露模具。大量的接口和组件可能导致许多潜在的故障位置。本研究解决的故障是与湿度相关的鉴定过程的结果。由于SIP封装的复杂性，在标准集成电路封装的失效分析（FA）程序之后，分析是完全破坏性的。这些调查不仅劳力密集，而且费用昂贵，可能持续长达2-3周。因此，为了提高效率和准确性，必须采用一种全新的故障分析方法，并根据SiP封装的复杂性进行调整。在本案例研究中，提出了一种创新的FA工作流程，其中包括锁定热成像和计算机断层扫描等先进技术。通过这些方法的实施，在不影响诊断准确性的情况下，大大减少了分析时间和成本。这项工作证明了适应FA方法来解决先进包装系统的独特挑战的必要性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Microelectronics Reliability 工程技术-工程：电子与电气

CiteScore

3.30

自引率

12.50%

发文量

342

审稿时长

68 days

期刊介绍： Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged. Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.