{"title":"Self-Aligned Staggered Amorphous-Indium-Gallium-Zinc-Oxide Thin-Film Transistors With Ultra-Low Contact Resistance for High-Speed Circuits Application","authors":"Chuanke Chen;Xinlv Duan;Congyan Lu;Xichen Chuai;Wanming Wu;Chunyu Zhang;Chen Gu;Guanhua Yang;Nianduan Lu;Di Geng;Ling Li","doi":"10.1109/JEDS.2025.3543212","DOIUrl":null,"url":null,"abstract":"A self-aligned (SA) staggered structure for amorphous-In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) is proposed. The bottom contact between n+-IGZO and source/drain (S/D) enables larger contact area and shorter current-transmission distance, thus reducing the contact resistance. The non-overlap structure helps to eliminate the overlap-induced parasitic capacitance, thereby improving the device operating speed. The fabricated SA staggered a-IGZO TFTs exhibit good performance, including channel-width-normalized contact resistance (RCW) as low as 1.53 <inline-formula> <tex-math>$\\Omega \\cdot \\mathrm{~cm}$ </tex-math></inline-formula> and transit frequency (fT) as high as 1.4 GHz, which are quite competitive in the field of high-speed a-IGZO TFTs.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"135-138"},"PeriodicalIF":2.0000,"publicationDate":"2025-02-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10891703","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of the Electron Devices Society","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10891703/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
A self-aligned (SA) staggered structure for amorphous-In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) is proposed. The bottom contact between n+-IGZO and source/drain (S/D) enables larger contact area and shorter current-transmission distance, thus reducing the contact resistance. The non-overlap structure helps to eliminate the overlap-induced parasitic capacitance, thereby improving the device operating speed. The fabricated SA staggered a-IGZO TFTs exhibit good performance, including channel-width-normalized contact resistance (RCW) as low as 1.53 $\Omega \cdot \mathrm{~cm}$ and transit frequency (fT) as high as 1.4 GHz, which are quite competitive in the field of high-speed a-IGZO TFTs.
期刊介绍:
The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.