{"title":"Homogeneous ZrO2 gate dielectrics with intermediate ozone oxidation for improved interface stability and leakage suppression in Ge-based MOS devices","authors":"Jongwon Lee , Hwayong Choi , Junseok Heo","doi":"10.1016/j.mssp.2025.109435","DOIUrl":null,"url":null,"abstract":"<div><div>With recent advances in semiconductor technology, Ge has gained significant attention as a high-mobility channel material. However, integrating Ge with high-k dielectrics remains challenging owing to the formation of unstable Ge suboxides at the interface, which degrade the device performance by increasing the interface trap density and leakage current. This study explores the use of a ZrO<sub>2</sub> interlayer, replacing Al<sub>2</sub>O<sub>3</sub>, followed by ozone post-oxidation (OPO) and an additional ZrO<sub>2</sub> deposition to create a homogeneous ZrO<sub>2</sub> gate dielectric on Ge. The resulting ZrO<sub>2</sub>/OPO/ZrO<sub>2</sub> structure effectively suppresses the formation of unstable Ge suboxides, blocks Ge diffusion, and reduces the number of polycrystalline ZrO<sub>2</sub> phases. These advantages have been confirmed through extensive material studies including high-resolution transmission electron microscopy, X-ray photoelectron spectroscopy, and X-ray diffraction. The electrical characteristics were examined using capacitance-voltage and current density-voltage measurements. Moreover, the leakage current behavior was further analyzed using current conduction mechanism models. The ZrO<sub>2</sub>/OPO/ZrO<sub>2</sub> stack exhibits a low equivalent oxide thickness (EOT) of 1.87 nm, an interface trap density (D<sub>it</sub>) of 2.48 × 10<sup>12</sup> cm<sup>−1</sup>ev<sup>−1</sup>, and a reduced leakage current density of 7.05 × 10<sup>−7</sup> A/cm<sup>2</sup> at 1 V. This study highlights the possibility of the ZrO<sub>2</sub>/OPO/ZrO<sub>2</sub> stack as a high-performance gate dielectric for next-generation Ge-based MOS devices.</div></div>","PeriodicalId":18240,"journal":{"name":"Materials Science in Semiconductor Processing","volume":"192 ","pages":""},"PeriodicalIF":4.2000,"publicationDate":"2025-03-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Materials Science in Semiconductor Processing","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1369800125001726","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
With recent advances in semiconductor technology, Ge has gained significant attention as a high-mobility channel material. However, integrating Ge with high-k dielectrics remains challenging owing to the formation of unstable Ge suboxides at the interface, which degrade the device performance by increasing the interface trap density and leakage current. This study explores the use of a ZrO2 interlayer, replacing Al2O3, followed by ozone post-oxidation (OPO) and an additional ZrO2 deposition to create a homogeneous ZrO2 gate dielectric on Ge. The resulting ZrO2/OPO/ZrO2 structure effectively suppresses the formation of unstable Ge suboxides, blocks Ge diffusion, and reduces the number of polycrystalline ZrO2 phases. These advantages have been confirmed through extensive material studies including high-resolution transmission electron microscopy, X-ray photoelectron spectroscopy, and X-ray diffraction. The electrical characteristics were examined using capacitance-voltage and current density-voltage measurements. Moreover, the leakage current behavior was further analyzed using current conduction mechanism models. The ZrO2/OPO/ZrO2 stack exhibits a low equivalent oxide thickness (EOT) of 1.87 nm, an interface trap density (Dit) of 2.48 × 1012 cm−1ev−1, and a reduced leakage current density of 7.05 × 10−7 A/cm2 at 1 V. This study highlights the possibility of the ZrO2/OPO/ZrO2 stack as a high-performance gate dielectric for next-generation Ge-based MOS devices.
期刊介绍:
Materials Science in Semiconductor Processing provides a unique forum for the discussion of novel processing, applications and theoretical studies of functional materials and devices for (opto)electronics, sensors, detectors, biotechnology and green energy.
Each issue will aim to provide a snapshot of current insights, new achievements, breakthroughs and future trends in such diverse fields as microelectronics, energy conversion and storage, communications, biotechnology, (photo)catalysis, nano- and thin-film technology, hybrid and composite materials, chemical processing, vapor-phase deposition, device fabrication, and modelling, which are the backbone of advanced semiconductor processing and applications.
Coverage will include: advanced lithography for submicron devices; etching and related topics; ion implantation; damage evolution and related issues; plasma and thermal CVD; rapid thermal processing; advanced metallization and interconnect schemes; thin dielectric layers, oxidation; sol-gel processing; chemical bath and (electro)chemical deposition; compound semiconductor processing; new non-oxide materials and their applications; (macro)molecular and hybrid materials; molecular dynamics, ab-initio methods, Monte Carlo, etc.; new materials and processes for discrete and integrated circuits; magnetic materials and spintronics; heterostructures and quantum devices; engineering of the electrical and optical properties of semiconductors; crystal growth mechanisms; reliability, defect density, intrinsic impurities and defects.