Selective hardening of RISCV soft-processors for space applications

IF 1.6 4区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Microelectronics Reliability Pub Date : 2025-03-04 DOI:10.1016/j.microrel.2025.115667

G. Cora, C. De Sio, S. Azimi, L. Sterpone

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引用次数: 0

Abstract

RISC-V soft processors are becoming popular in various fields, including safety-critical ones, thanks to their open-source nature and flexibility. Despite the rapid progress in the reliability analysis of these devices, all the mitigation techniques are usually adopted to the whole soft-processor architecture.

In this study, we aim to identify the internal components of the RISC-V architecture that are particularly prone to errors, and accordingly investigate how the reliability of the design is affected when mitigation strategies, such as Triple Modular Redundancy (TMR), are applied selectively just to them.

The proposed approach has been applied to RISC-V architecture, NEORV32 which is implemented on Zynq 7020 SoC on a PYNQ-Z2 board. While more vulnerable modules of NEORV32 were identified through accurate reliability analysis, implementing selective TMR in these modules shows achieving satisfactory reliability levels while reducing the overall space requirements compared to a complete TMR design.

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空间应用的RISCV软处理器的选择性硬化

RISC-V软处理器由于其开源特性和灵活性，在包括安全关键领域在内的各个领域越来越受欢迎。尽管这些器件的可靠性分析进展迅速，但所有的缓解技术通常都适用于整个软处理器体系结构。在本研究中，我们的目标是确定RISC-V架构中特别容易出错的内部组件，并相应地研究当三重模块冗余（TMR）等缓解策略选择性地应用于它们时，设计的可靠性是如何受到影响的。所提出的方法已应用于RISC-V架构NEORV32， NEORV32在Zynq 7020 SoC上的PYNQ-Z2板上实现。虽然通过准确的可靠性分析，NEORV32中更多的脆弱模块被识别出来，但与完整的TMR设计相比，在这些模块中实施选择性TMR，可以达到令人满意的可靠性水平，同时降低总体空间要求。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Microelectronics Reliability 工程技术-工程：电子与电气

CiteScore

3.30

自引率

12.50%

发文量

342

审稿时长

68 days

期刊介绍： Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged. Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.