ANN-Driven Modeling of Gate-All-Around Transistors Incorporating Complete Current Profiles

IF 2.1 4区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Anant Singhal;Harshit Agarwal
{"title":"ANN-Driven Modeling of Gate-All-Around Transistors Incorporating Complete Current Profiles","authors":"Anant Singhal;Harshit Agarwal","doi":"10.1109/TNANO.2025.3542165","DOIUrl":null,"url":null,"abstract":"In this article, we present an Artificial Neural Network (ANN)-based compact model that accurately captures the complete current characteristics of gate-all-around transistors, including drain, gate, and substrate currents. Unlike previous models, our approach simplifies the modeling of substrate current by defining a simple conversion function and by utilizing simpler loss functions that account for physical effects such as impact ionization. This accurate representation of substrate current is critical for addressing hot-carrier-induced reliability concerns. The proposed model is extensively validated with calibrated Technology Computer-Aided Design (TCAD) simulations as well as with experimental data from multiple technologies. Additionally, it demonstrates smooth higher-order derivatives in symmetry tests, ensuring its suitability for RF applications.","PeriodicalId":449,"journal":{"name":"IEEE Transactions on Nanotechnology","volume":"24 ","pages":"110-114"},"PeriodicalIF":2.1000,"publicationDate":"2025-02-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Nanotechnology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10887260/","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

In this article, we present an Artificial Neural Network (ANN)-based compact model that accurately captures the complete current characteristics of gate-all-around transistors, including drain, gate, and substrate currents. Unlike previous models, our approach simplifies the modeling of substrate current by defining a simple conversion function and by utilizing simpler loss functions that account for physical effects such as impact ionization. This accurate representation of substrate current is critical for addressing hot-carrier-induced reliability concerns. The proposed model is extensively validated with calibrated Technology Computer-Aided Design (TCAD) simulations as well as with experimental data from multiple technologies. Additionally, it demonstrates smooth higher-order derivatives in symmetry tests, ensuring its suitability for RF applications.
求助全文
约1分钟内获得全文 求助全文
来源期刊
IEEE Transactions on Nanotechnology
IEEE Transactions on Nanotechnology 工程技术-材料科学:综合
CiteScore
4.80
自引率
8.30%
发文量
74
审稿时长
8.3 months
期刊介绍: The IEEE Transactions on Nanotechnology is devoted to the publication of manuscripts of archival value in the general area of nanotechnology, which is rapidly emerging as one of the fastest growing and most promising new technological developments for the next generation and beyond.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信