First Demonstration of Deeply Scaled 2T0C DRAM With Record Data Retention and Fast Write Speed

IF 4.1 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Shenwu Zhu;Qianlan Hu;Qijun Li;Shiwei Yan;Honggang Liu;Ranhui Liu;Yanqing Wu
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引用次数: 0

Abstract

In this work, the first pitch scaling of 2T0C dynamic random-access memory (DRAM) based on indium-tin-oxide (ITO) transistors has been successfully fabricated, achieving a record-low contact length of 20 nm and channel length of 10 nm. The deeply scaled 2T0C DRAM demonstrates multi-level operation with an ultra-fast write speed of 10 ns, facilitated by a high on-state current. Furthermore, it features an outstanding data retention time exceeding 3000 s, attributed to its low off-state leakage current of $1.3 \times {10}^{-20}$ A/ $\mu $ m. This work highlights the tremendous potential of oxide semiconductor-based 2T0C DRAM for future high-density memory applications.
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来源期刊
IEEE Electron Device Letters
IEEE Electron Device Letters 工程技术-工程:电子与电气
CiteScore
8.20
自引率
10.20%
发文量
551
审稿时长
1.4 months
期刊介绍: IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
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