TCAD Study of Giant Negative Differential Resistance in Nanoscale Ferroelectric Field-Effect Transistors

Abstract

Semiconductor devices that exhibit a negative differential resistance (NDR) characteristic have long been sought after due to their promise of enabling more compact and/or more efficient integrated circuits compared to implementations using only complementary metal-oxide-semiconductor (CMOS) field-effect transistors (FETs). A significant challenge for the development of NDR devices is the need for them to be compatible with established integrated circuit (IC) manufacturing processes while meeting the stringent performance and power requirements of modern IC designs. Ferroelectric FETs (FeFETs) based on CMOS-compatible, hafnia-based ferroelectric gate stack materials have been investigated broadly in the past decade for potential uses in nonvolatile memory, steeply switching logic devices, and neuromorphic computing. In this work a novel FeFET designed to achieve giant NDR behavior is investigated via TCAD simulation, and is projected to achieve peak current above 100 $\mu $ A/ $\mu $ m, sub-ns operating speed, and peak-to-valley current ratio (PVCR) exceeding 106, which can enable compact static memory bit-cells.