Controlling Speckle Contrast Using Existing Lithographic Scanner Knobs to Explore the Impact on Line Width Roughness

Abstract

Local critical dimension uniformity (LCDU) or line width roughness (LWR) is increasingly important in argon fluoride (ArF) immersion lithography systems (scanners) due to its growing contribution to edge placement error (EPE), an important parameter for circuit designers. A significant scanner contributor to LCDU is speckle, a light interference pattern that arises due to random coherent wavelet interference. In lithography systems (scanners), speckle will result in non-uniform dose delivery to the mask, causing local CD variations of the patterns imaged in the resist. This is an unwanted effect that potentially results in defects and should thus be controlled. In this work, existing lithographic scanner knobs are used to vary speckle contrast to showcase what product performance gain it can bring on LWR. This is achieved by slowing down the exposure speed, decreasing speckle contrast due to an increased number of pulses that fit in the exposure slit. However, this simultaneously brings scanner dynamics improvement that enhances imaging contrast which in turn also improves LWR. In order to decouple the dynamics and speckle improvement, additional experiments are required. This is done by restoring the speckle contrast for the slowed down exposures by adjusting the pulsed laser repetition rate. In the end, this series of experiments leads to a powerful framework to evaluate solely the speckle gain to product performance. In this work, the method is used to predict the LWR performance gain of the new ASML pulse stretcher which is designed to improve speckle contrast. Next to that, simulations are performed which accurately forecast the experimental results, demonstrating the robustness of the proposed framework. This work not only offers insights into optimizing the lithographic processes for improved product performance but also lays the groundwork for further exploration into scanner control strategies to minimize LWR and enhance yield in semiconductor manufacturing.