{"title":"Interface trap charge modeling of surrounding gate-engineered tubular channel junctionless MOSFET exploring temperature induced variations","authors":"Pritha Banerjee, Jayoti Das","doi":"10.1016/j.microrel.2024.115583","DOIUrl":null,"url":null,"abstract":"<div><div>Current research presents the mathematical modeling highlighting the interface trap charge degraded characteristics of Surrounding Gate-Engineered Tubular Channel Junctionless MOSFET including temperature variation. Salient device features such as drain current, Ion/Ioff ratio, transconductance, off-current temperature sensitivity, threshold voltage have been explored to investigate the temperature influences comparing the damaged and undamaged configuration of the device. Extent of subthreshold swing variations under thermal influence has been analyzed. Impact of channel length scaling, channel thickness and oxide-thickness variation on device features have also been reported in this research. Analytical outputs have been corroborated using simulation outputs from Silvaco Atlas 3D.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115583"},"PeriodicalIF":1.6000,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Reliability","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0026271424002634","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Current research presents the mathematical modeling highlighting the interface trap charge degraded characteristics of Surrounding Gate-Engineered Tubular Channel Junctionless MOSFET including temperature variation. Salient device features such as drain current, Ion/Ioff ratio, transconductance, off-current temperature sensitivity, threshold voltage have been explored to investigate the temperature influences comparing the damaged and undamaged configuration of the device. Extent of subthreshold swing variations under thermal influence has been analyzed. Impact of channel length scaling, channel thickness and oxide-thickness variation on device features have also been reported in this research. Analytical outputs have been corroborated using simulation outputs from Silvaco Atlas 3D.
期刊介绍:
Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged.
Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.