{"title":"Reliable modular designs under time-continuous input data","authors":"Salin Junsangsri, Fabrizio Lombardi","doi":"10.1016/j.microrel.2024.115582","DOIUrl":null,"url":null,"abstract":"<div><div>This paper proposes new designs of double modular redundancy (DMR) when time-continuous data is provided as inputs. As this type of data tends slightly change over adjacent time periods, the proposed designs exploit this property by comparing consecutive outputs for reliable computing. The proposed designs are based on the difference between the two consecutive inputs/outputs, referred to as factor. These new designs are four one-factor and a single two-factor scheme. They overcome the negative feature of a previous design (referred to as self-voting) by which an uncontrollable output is encountered when input data is time-continuous and both primary inputs are not equal, i.e. in the presence of an error, the output remains at the same value prior to the occurrence of the error, so making it unsuitable for these types of applications. The proposed designs are evaluated in terms of the required decision hardware (to generate the output) and its accuracy using Cadence Genus Synthesis Solution on a 32 nm library; it is shown that the decision hardware of the two-factor scheme is more complex than for the one-factor schemes, yielding to a longer delay and higher power dissipation/area. Different data sets as well as a randomly generated data set are utilized in the evaluation. Simulation results show that the two-factor scheme provides the highest level of accuracy at the output as this is directly related to the complexity of the decision hardware:</div></div><div><h3>Index terms</h3><div>Redundancy, Double Modular Redundancy (DMR), Self-voting majority, Continuous data set, Reliable Computing</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115582"},"PeriodicalIF":1.6000,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Reliability","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0026271424002622","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This paper proposes new designs of double modular redundancy (DMR) when time-continuous data is provided as inputs. As this type of data tends slightly change over adjacent time periods, the proposed designs exploit this property by comparing consecutive outputs for reliable computing. The proposed designs are based on the difference between the two consecutive inputs/outputs, referred to as factor. These new designs are four one-factor and a single two-factor scheme. They overcome the negative feature of a previous design (referred to as self-voting) by which an uncontrollable output is encountered when input data is time-continuous and both primary inputs are not equal, i.e. in the presence of an error, the output remains at the same value prior to the occurrence of the error, so making it unsuitable for these types of applications. The proposed designs are evaluated in terms of the required decision hardware (to generate the output) and its accuracy using Cadence Genus Synthesis Solution on a 32 nm library; it is shown that the decision hardware of the two-factor scheme is more complex than for the one-factor schemes, yielding to a longer delay and higher power dissipation/area. Different data sets as well as a randomly generated data set are utilized in the evaluation. Simulation results show that the two-factor scheme provides the highest level of accuracy at the output as this is directly related to the complexity of the decision hardware:
期刊介绍:
Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged.
Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.