Reliable modular designs under time-continuous input data

IF 1.6 4区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Salin Junsangsri, Fabrizio Lombardi
{"title":"Reliable modular designs under time-continuous input data","authors":"Salin Junsangsri,&nbsp;Fabrizio Lombardi","doi":"10.1016/j.microrel.2024.115582","DOIUrl":null,"url":null,"abstract":"<div><div>This paper proposes new designs of double modular redundancy (DMR) when time-continuous data is provided as inputs. As this type of data tends slightly change over adjacent time periods, the proposed designs exploit this property by comparing consecutive outputs for reliable computing. The proposed designs are based on the difference between the two consecutive inputs/outputs, referred to as factor. These new designs are four one-factor and a single two-factor scheme. They overcome the negative feature of a previous design (referred to as self-voting) by which an uncontrollable output is encountered when input data is time-continuous and both primary inputs are not equal, i.e. in the presence of an error, the output remains at the same value prior to the occurrence of the error, so making it unsuitable for these types of applications. The proposed designs are evaluated in terms of the required decision hardware (to generate the output) and its accuracy using Cadence Genus Synthesis Solution on a 32 nm library; it is shown that the decision hardware of the two-factor scheme is more complex than for the one-factor schemes, yielding to a longer delay and higher power dissipation/area. Different data sets as well as a randomly generated data set are utilized in the evaluation. Simulation results show that the two-factor scheme provides the highest level of accuracy at the output as this is directly related to the complexity of the decision hardware:</div></div><div><h3>Index terms</h3><div>Redundancy, Double Modular Redundancy (DMR), Self-voting majority, Continuous data set, Reliable Computing</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"165 ","pages":"Article 115582"},"PeriodicalIF":1.6000,"publicationDate":"2025-02-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Reliability","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0026271424002622","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

Abstract

This paper proposes new designs of double modular redundancy (DMR) when time-continuous data is provided as inputs. As this type of data tends slightly change over adjacent time periods, the proposed designs exploit this property by comparing consecutive outputs for reliable computing. The proposed designs are based on the difference between the two consecutive inputs/outputs, referred to as factor. These new designs are four one-factor and a single two-factor scheme. They overcome the negative feature of a previous design (referred to as self-voting) by which an uncontrollable output is encountered when input data is time-continuous and both primary inputs are not equal, i.e. in the presence of an error, the output remains at the same value prior to the occurrence of the error, so making it unsuitable for these types of applications. The proposed designs are evaluated in terms of the required decision hardware (to generate the output) and its accuracy using Cadence Genus Synthesis Solution on a 32 nm library; it is shown that the decision hardware of the two-factor scheme is more complex than for the one-factor schemes, yielding to a longer delay and higher power dissipation/area. Different data sets as well as a randomly generated data set are utilized in the evaluation. Simulation results show that the two-factor scheme provides the highest level of accuracy at the output as this is directly related to the complexity of the decision hardware:

Index terms

Redundancy, Double Modular Redundancy (DMR), Self-voting majority, Continuous data set, Reliable Computing
求助全文
约1分钟内获得全文 求助全文
来源期刊
Microelectronics Reliability
Microelectronics Reliability 工程技术-工程:电子与电气
CiteScore
3.30
自引率
12.50%
发文量
342
审稿时长
68 days
期刊介绍: Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged. Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信