Binary and ternary compatible NAND/NOR logic-in-memory cell constructed with single-gated feedback field-effect transistors

IF 4.2 3区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

Materials Science in Semiconductor Processing Pub Date : 2025-02-02 DOI:10.1016/j.mssp.2025.109357

Donghyung Lee , Yunwoo Shin , Jaemin Son , Kyoungah Cho , Sangsig Kim

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引用次数: 0

Abstract

Computing-intensive applications such as big data, machine vision and learning, and artificial intelligence require efficient and compact microprocessors composed of ultra-high-density integrated circuits. Consequently, new memory and logic cells with small footprints that can be fabricated with standard complementary metal-oxide processes must be designed. Herein, a binary and ternary compatible logic-in-memory (BTC-LIM) cell comprising eight single-gated feedback field-effect transistors (FBFETs) that have an extremely low subthreshold swing (<1 mV/dec), a high ON/OFF current ratio (>10⁷), and memory characteristics was designed and evaluated. In this cell, binary and ternary logic functions are implemented utilizing the ON or OFF states of the n- and p-channel FBFETs, and the binary logic is a subset of the ternary logic. The cell performs NAND and NOR LIM operations and maintains its output value up to 50 s under zero-bias conditions.

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来源期刊

Materials Science in Semiconductor Processing 工程技术-材料科学：综合

CiteScore

8.00

自引率

4.90%

发文量

780

审稿时长

42 days

期刊介绍： Materials Science in Semiconductor Processing provides a unique forum for the discussion of novel processing, applications and theoretical studies of functional materials and devices for (opto)electronics, sensors, detectors, biotechnology and green energy. Each issue will aim to provide a snapshot of current insights, new achievements, breakthroughs and future trends in such diverse fields as microelectronics, energy conversion and storage, communications, biotechnology, (photo)catalysis, nano- and thin-film technology, hybrid and composite materials, chemical processing, vapor-phase deposition, device fabrication, and modelling, which are the backbone of advanced semiconductor processing and applications. Coverage will include: advanced lithography for submicron devices; etching and related topics; ion implantation; damage evolution and related issues; plasma and thermal CVD; rapid thermal processing; advanced metallization and interconnect schemes; thin dielectric layers, oxidation; sol-gel processing; chemical bath and (electro)chemical deposition; compound semiconductor processing; new non-oxide materials and their applications; (macro)molecular and hybrid materials; molecular dynamics, ab-initio methods, Monte Carlo, etc.; new materials and processes for discrete and integrated circuits; magnetic materials and spintronics; heterostructures and quantum devices; engineering of the electrical and optical properties of semiconductors; crystal growth mechanisms; reliability, defect density, intrinsic impurities and defects.