A Novel Approach to Integrating Thermal Performance and Total Ionizing Dose Hardening in Void-Embedded Silicon-on-Insulator MOSFET

IF 2.9 2区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Transactions on Electron Devices Pub Date : 2024-12-05 DOI:10.1109/TED.2024.3506504

Jin Chen;Qiang Liu;Yuxin Liu;Zhiqiang Mu;Xing Wei;Wenjie Yu

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引用次数: 0

Abstract

The excellent tolerance against total ionizing dose (TID) effect and high compatibility with conventional technology nodes has been demonstrated in our previous work with void-embedded-silicon-on-insulator (VESOI) device. However, the presence of embedded void structures within the VESOI devices also introduces additional thermal performance challenges. To address this issue while maintaining the exceptional TID tolerance, we conducted a comprehensive study on the role played by embedded void in blocking both thermal conduction and radiation induced leakage path. Through both pulse I–V tests and systematic simulations, we have revealed the close relationship between the heat sinking capability of VESOI devices and the embedded voids with different structures and dimensions. By applying a nanoscale-embedded chamber extending into the middle channel of VESOI MOSFET, the increase of temperature in the channel is suppressed to a rather low level of 0.3 K. Furthermore, the nano void chamber is also found effective in cutting off radiation-induced leakage paths lying near the bottom channel, resulting in a reduction of the leakage current to

$10^{-{11}}~\mu $

$\mu $

m. This study paves the way for developing more robust and efficient devices based on VESOI technology that can maintain better thermal performance along with TID robustness.

查看原文本刊更多论文

一种集成空嵌式绝缘体上硅MOSFET热性能和总电离剂量硬化的新方法

在我们之前的研究中，我们已经证明了该器件对总电离剂量（TID）效应的良好耐受性和与传统技术节点的高兼容性。然而，VESOI器件中嵌入空隙结构的存在也带来了额外的热性能挑战。为了解决这一问题，同时保持特殊的TID容限，我们对嵌入空隙在阻断热传导和辐射诱导泄漏路径中的作用进行了全面的研究。通过脉冲I-V测试和系统模拟，揭示了不同结构和尺寸的嵌入孔洞与VESOI器件的散热能力密切相关。通过在VESOI MOSFET的中间通道中加入纳米级嵌入腔，将通道内的温度升高抑制在0.3 K的较低水平。此外，纳米空腔还被发现可以有效地切断位于底部通道附近的辐射引起的泄漏路径，从而将泄漏电流降低到$10^{-{11}}~\mu $ a / $\mu $ m。该研究为开发基于VESOI技术的更坚固高效的器件铺平了道路，该器件可以保持更好的热性能和TID鲁棒性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Electron Devices 工程技术-工程：电子与电气

CiteScore

5.80

自引率

16.10%

发文量

937

审稿时长

3.8 months

期刊介绍： IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors. Tutorial and review papers on these subjects are also published and occasional special issues appear to present a collection of papers which treat particular areas in more depth and breadth.