Impact of Temperature on Digital Integrated Circuits in a 4H-SiC CMOS Technology

Abstract

This article reports the influence of temperature on digital ICs fabricated in 4H-SiC CMOS process technology. The performances of CMOS devices were compared and analyzed at different drain voltages from 25 °C to 500 °C. The current-output capability of n-channel MOSFET improves with increasing temperature up to 500 °C, while that of p-channel MOSFET reaches an optimum at nearly 350 °C. The current-output capability of n-channel MOSFET is limited to lower than that of p-channel MOSFET below a temperature point when the drain voltage rises, due to the velocity saturation of electrons. Furthermore, the value of temperature point increases with higher drain voltage. A typical inverter was characterized and analyzed in detail based on the characteristics of CMOS devices. The fall/rise time and high-to-low/low-to-high propagation delay time show a similar temperature characteristic of the drain current of n- and p-channel MOSFETs, respectively. Compared to fall and rise times, the high-to-low and low-to-high propagation delay times intersect at a higher temperature because of the different drain voltages when extracting parameters. The temperature characteristics, including the oscillation frequency of ring oscillators and the output current of gate driver, were also analyzed through the performances of CMOS devices.