{"title":"Improved Memory Performance Through Integration of Ferroelectric and Ovonic Threshold Switching Layer","authors":"Laeyong Jung;Jangseop Lee;Seungyeol Oh;Yoori Seo;Ohhyuk Kwon;Hyunsang Hwang","doi":"10.1109/LED.2024.3497957","DOIUrl":null,"url":null,"abstract":"In this study, we explore the combined effects of a ferroelectric (FE) layer with an ovonic threshold switching (OTS) layer to enhance the performance of memory devices. Initially, to enlarge memory window, an FE layer was used to induce bidirectional shifts in the threshold voltage (V\n<inline-formula> <tex-math>$_{\\text {th}}\\text {)}$ </tex-math></inline-formula>\n of OTS. This polarization-induced modulation led to an additional memory window compared to a case where the applied polarization field was not applied. Subsequently, to enhance the reliability, FE layer’s persistent field was leveraged for mitigating the OTS layer’s effective electric field. This polarization field served as an additional pulse scheme, thereby reducing the relaxation effect of traps and improving drift. Finally, our findings demonstrated FE layer’s capability to facilitate multi-level states via adjustable polarization and a large memory window. We also examined the integration with a selenium-based selector only memory (SOM) device, where we observed a notable enhancement in memory window, exceeding 2 V. These findings suggest the potential for significant improvements in SOM by strategically integrating FE and OTS layers.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 1","pages":"44-47"},"PeriodicalIF":4.1000,"publicationDate":"2024-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10753046/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
In this study, we explore the combined effects of a ferroelectric (FE) layer with an ovonic threshold switching (OTS) layer to enhance the performance of memory devices. Initially, to enlarge memory window, an FE layer was used to induce bidirectional shifts in the threshold voltage (V
$_{\text {th}}\text {)}$
of OTS. This polarization-induced modulation led to an additional memory window compared to a case where the applied polarization field was not applied. Subsequently, to enhance the reliability, FE layer’s persistent field was leveraged for mitigating the OTS layer’s effective electric field. This polarization field served as an additional pulse scheme, thereby reducing the relaxation effect of traps and improving drift. Finally, our findings demonstrated FE layer’s capability to facilitate multi-level states via adjustable polarization and a large memory window. We also examined the integration with a selenium-based selector only memory (SOM) device, where we observed a notable enhancement in memory window, exceeding 2 V. These findings suggest the potential for significant improvements in SOM by strategically integrating FE and OTS layers.
期刊介绍:
IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.