Shengwei Gao;Xiaoyu Fu;Xingtao Sun;Tian Jinrui;Yesen Han
{"title":"Investigation of Switching Characteristics Degradation of GaN HEMT Under Power Cycling Aging","authors":"Shengwei Gao;Xiaoyu Fu;Xingtao Sun;Tian Jinrui;Yesen Han","doi":"10.1109/TDMR.2024.3468013","DOIUrl":null,"url":null,"abstract":"GaN HEMT devices have wide application prospects because of their high electron mobility and excellent electrical characteristics. However, due to the lack of reliability analysis of the switching characteristics, GaN HEMT devices are unable to realize their maximum potential in practical applications. In this paper, GaN HEMT devices are aged based on power cycling. The switching degradation behavior of GaN HEMT devices after aging is characterized by double pulse test. The test results show that the switching delay increases, the Miller platform lengthens, and the opening ringing decreases after power cycle aging. In order to explore the degradation mechanism, the effects of parasitic capacitance on the switching characteristics are characterized by double pulse test of parallel capacitors. Based on the analysis of the parasitic capacitance model, the degradation trend of each parasitic capacitance caused by trap after aging is deduced and verified by experiment. The results show that the trap increase of AlGaN layer caused by inverse piezoelectric effect and hot-electron effect is the main reason for the change of parasitic capacitance after aging, while the on-state and off-state capacitance of GaN HEMT devices have completely different composition mechanism and change trends, which lead to different trends and degrees of degradation of each switching characteristic. This can provide a valuable reference for the reliability of GaN HEMT devices in long-term applications.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"24 4","pages":"610-617"},"PeriodicalIF":2.5000,"publicationDate":"2024-09-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Device and Materials Reliability","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10699373/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
GaN HEMT devices have wide application prospects because of their high electron mobility and excellent electrical characteristics. However, due to the lack of reliability analysis of the switching characteristics, GaN HEMT devices are unable to realize their maximum potential in practical applications. In this paper, GaN HEMT devices are aged based on power cycling. The switching degradation behavior of GaN HEMT devices after aging is characterized by double pulse test. The test results show that the switching delay increases, the Miller platform lengthens, and the opening ringing decreases after power cycle aging. In order to explore the degradation mechanism, the effects of parasitic capacitance on the switching characteristics are characterized by double pulse test of parallel capacitors. Based on the analysis of the parasitic capacitance model, the degradation trend of each parasitic capacitance caused by trap after aging is deduced and verified by experiment. The results show that the trap increase of AlGaN layer caused by inverse piezoelectric effect and hot-electron effect is the main reason for the change of parasitic capacitance after aging, while the on-state and off-state capacitance of GaN HEMT devices have completely different composition mechanism and change trends, which lead to different trends and degrees of degradation of each switching characteristic. This can provide a valuable reference for the reliability of GaN HEMT devices in long-term applications.
期刊介绍:
The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.