A 10-Gb/s Optical Receiver With Monolithically Integrated PIN Photodiode, Novel AGC, and Sensitivity of –27.1 dBm for BER 10-3

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Solid-State Circuits Letters Pub Date : 2024-12-04 DOI:10.1109/LSSC.2024.3511582

Wenyu Zhou;Larry Tarof;Rony E. Amaya

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引用次数: 0

Abstract

A monolithically integrated optical receiver in InP for 10-Gb/s intensity modulation direct detect (IMDD) application is presented. The sensitivity at the bit error rate (BER)

$\rm 10^{-3}$

is measured to be –27.1 dBm. An integrated PIN diode photodetector (PD) minimizes the parasitics caused by wire bonds between the PD and the transimpedance amplifier (TIA). For the first time, electronics and photonics are monolithically integrated into a single InP IC. The avalanche photodetector (APD) is replaced with PIN PD, exhibiting comparable sensitivity and requiring a simple 3.3-V supply voltage. A single transistor voltage-to-current convertor between two cascaded TIAs performs automatic gain control (AGC). A total dynamic gain control of 9 dB has been demonstrated with a dynamic range of more than 17 dB, employing only four transistors and dissipating 8.5 mW. Improved gain peaking extends the operating bandwidth and makes it suitable for higher-speed applications. The power supply rejection ratio (PSRR) exceeds 24 dB without needing on-chip bandgap references.

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来源期刊

IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering

CiteScore

4.30

自引率

3.70%

发文量