Aodong Chen;Fei Xu;Li Han;Yuan Dong;Li Chen;Zhi Zhou;Fangming Liu
{"title":"Opara: Exploiting Operator Parallelism for Expediting DNN Inference on GPUs","authors":"Aodong Chen;Fei Xu;Li Han;Yuan Dong;Li Chen;Zhi Zhou;Fangming Liu","doi":"10.1109/TC.2024.3475589","DOIUrl":null,"url":null,"abstract":"GPUs have become the \n<i>defacto</i>\n hardware devices for accelerating Deep Neural Network (DNN) inference workloads. However, the conventional \n<i>sequential execution mode of DNN operators</i>\n in mainstream deep learning frameworks cannot fully utilize GPU resources, even with the operator fusion enabled, due to the increasing complexity of model structures and a greater diversity of operators. Moreover, the \n<i>inadequate operator launch order</i>\n in parallelized execution scenarios can lead to GPU resource wastage and unexpected performance interference among operators. In this paper, we propose \n<i>Opara</i>\n, a resource- and interference-aware DNN \n<u>Op</u>\nerator \n<u>para</u>\nllel scheduling framework to accelerate DNN inference on GPUs. Specifically, \n<i>Opara</i>\n first employs \n<monospace>CUDA Streams</monospace>\n and \n<monospace>CUDA Graph</monospace>\n to \n<i>parallelize</i>\n the execution of multiple operators automatically. To further expedite DNN inference, \n<i>Opara</i>\n leverages the resource demands of operators to judiciously adjust the operator launch order on GPUs, overlapping the execution of compute-intensive and memory-intensive operators. We implement and open source a prototype of \n<i>Opara</i>\n based on PyTorch in a \n<i>non-intrusive</i>\n manner. Extensive prototype experiments with representative DNN and Transformer-based models demonstrate that \n<i>Opara</i>\n outperforms the default sequential \n<monospace>CUDA Graph</monospace>\n in PyTorch and the state-of-the-art operator parallelism systems by up to \n<inline-formula><tex-math>$1.68\\boldsymbol{\\times}$</tex-math></inline-formula>\n and \n<inline-formula><tex-math>$1.29\\boldsymbol{\\times}$</tex-math></inline-formula>\n, respectively, yet with acceptable runtime overhead.","PeriodicalId":13087,"journal":{"name":"IEEE Transactions on Computers","volume":"74 1","pages":"325-333"},"PeriodicalIF":3.6000,"publicationDate":"2024-10-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Computers","FirstCategoryId":"94","ListUrlMain":"https://ieeexplore.ieee.org/document/10707307/","RegionNum":2,"RegionCategory":"计算机科学","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
GPUs have become the
defacto
hardware devices for accelerating Deep Neural Network (DNN) inference workloads. However, the conventional
sequential execution mode of DNN operators
in mainstream deep learning frameworks cannot fully utilize GPU resources, even with the operator fusion enabled, due to the increasing complexity of model structures and a greater diversity of operators. Moreover, the
inadequate operator launch order
in parallelized execution scenarios can lead to GPU resource wastage and unexpected performance interference among operators. In this paper, we propose
Opara
, a resource- and interference-aware DNN
Op
erator
para
llel scheduling framework to accelerate DNN inference on GPUs. Specifically,
Opara
first employs
CUDA Streams
and
CUDA Graph
to
parallelize
the execution of multiple operators automatically. To further expedite DNN inference,
Opara
leverages the resource demands of operators to judiciously adjust the operator launch order on GPUs, overlapping the execution of compute-intensive and memory-intensive operators. We implement and open source a prototype of
Opara
based on PyTorch in a
non-intrusive
manner. Extensive prototype experiments with representative DNN and Transformer-based models demonstrate that
Opara
outperforms the default sequential
CUDA Graph
in PyTorch and the state-of-the-art operator parallelism systems by up to
$1.68\boldsymbol{\times}$
and
$1.29\boldsymbol{\times}$
, respectively, yet with acceptable runtime overhead.
期刊介绍:
The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field. It publishes papers on research in areas of current interest to the readers. These areas include, but are not limited to, the following: a) computer organizations and architectures; b) operating systems, software systems, and communication protocols; c) real-time systems and embedded systems; d) digital devices, computer components, and interconnection networks; e) specification, design, prototyping, and testing methods and tools; f) performance, fault tolerance, reliability, security, and testability; g) case studies and experimental and theoretical evaluations; and h) new and important applications and trends.