Defects in polysilicon channel: Insight from first principles and multi-scale modelling

Abstract

With increasing demand for essential components in the field of electronic devices, enabling advancements in display technology, flexible electronics, and various industrial applications, thin-film transistors (TFTs) are significant. Their versatility and compatibility with low-temperature fabrication processes make them a vital element in advanced electronic systems. The use of polycrystalline silicon (Poly-Si) as the channel material is specific to TFT applications unlike single-crystal/epitaxial Si in high-performance integrated circuit transistors. Poly-Si is characterized by the presence of defects such as voids, grain boundaries (GBs), and dislocations, that exert detrimental influence on electrical conductivity and then on device performance. Understanding of these would help engineer the novel TFT devices with superior reliability. In this context, Fundamental properties of the GBs are calculated using density functional theory (DFT) and their impact on poly-Si TFTs performance and figures of merit is assessed using the Ginestra® simulation platform. To account the process contaminations, the impact of known lighter impurities on GBs is comprehensively studied. In this paper we show how material properties from DFT can be effectively virtualized to predict electronic device performance, enable fast and reliable evaluation of device sensitivity to material changes, and how outputs of this multi-scale modelling process agree with experiments.