Heterogeneous Integration Technologies for Artificial Intelligence Applications

IF 2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits Pub Date : 2024-10-23 DOI:10.1109/JXCDC.2024.3484958

Madison Manley;Ashita Victor;Hyunggyu Park;Ankit Kaul;Mohanalingam Kathaperumal;Muhannad S. Bakir

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引用次数: 0

Abstract

The rapid advancement of artificial intelligence (AI) has been enabled by semiconductor-based electronics. However, the conventional methods of transistor scaling are not enough to meet the exponential demand for computing power driven by AI. This has led to a technological shift toward system-level scaling approaches, such as heterogeneous integration (HI). HI is becoming increasingly implemented in many AI accelerator products due to its potential to enhance overall system performance while also reducing electrical interconnect delays and energy consumption, which are critical for supporting data-intensive AI workloads. In this review, we introduce current and emerging HI technologies and their potential for high-performance systems. We then survey recent industrial and research progress in 3-D HI technologies that enable high bandwidth systems and finally present the emergence of glass core packaging for high-performance AI chip packages.

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人工智能应用的异构集成技术

基于半导体的电子技术推动了人工智能（AI）的快速发展。然而，传统的晶体管扩展方法不足以满足人工智能对计算能力的指数级需求。这导致技术转向系统级扩展方法，如异构集成（HI）。由于异构集成具有提高整体系统性能的潜力，同时还能减少电气互连延迟和能耗，这对于支持数据密集型人工智能工作负载至关重要，因此越来越多的人工智能加速器产品开始采用异构集成。在本综述中，我们将介绍当前和新兴的 HI 技术及其在高性能系统中的应用潜力。然后，我们考察了实现高带宽系统的三维 HI 技术的最新工业和研究进展，最后介绍了用于高性能人工智能芯片封装的玻璃芯封装的出现。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Journal on Exploratory Solid-State Computational Devices and Circuits COMPUTER SCIENCE, HARDWARE & ARCHITECTURE-

CiteScore

5.00

自引率

4.20%

发文量

审稿时长

13 weeks