{"title":"Conductive Bridging Random Access Memory-Based Switch Matrix for Reconfigurable Interconnection of Chiplet Integration","authors":"Zong-Rui Xu;Zhi-Yi Zhang;Zhangchen Hou;Aiping Cao;Zhigao Hu;Lin-Sheng Wu","doi":"10.1109/LED.2024.3447063","DOIUrl":null,"url":null,"abstract":"A reconfigurable interconnection technology is proposed in this letter for chiplet integrated systems, with conductive bridging random access memory (CBRAM) based switch matrix. The switch matrix with a crossbar structure is implemented easily by spin-coating process, compatible with the packaging technology of high-resistivity silicon interposer. The equivalent circuit model is established. A \n<inline-formula> <tex-math>${2}\\times {2}$ </tex-math></inline-formula>\n switch matrix prototype is developed with the insertion loss below 3.8 dB for arbitrary transmission path from DC to 67 GHz. The fabricated \n<inline-formula> <tex-math>${4}\\times {4}$ </tex-math></inline-formula>\n switch matrix prototype achieves the 3-dB bandwidth over DC to 30 GHz. Under the data rate of 30 Gbps and the rise time of 15 ps, the near- and far-end crosstalks are all below 3% of the input signal swing, the eye height is 71%, and the root-mean-square jitter is only 1.26 ps. Noting that the CBRAM-based switch matrix consumes no static power, the proposed reconfigurable passive silicon interposer is a promising technology for flexible chiplet integration.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"45 10","pages":"1823-1826"},"PeriodicalIF":4.1000,"publicationDate":"2024-08-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10643087/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
A reconfigurable interconnection technology is proposed in this letter for chiplet integrated systems, with conductive bridging random access memory (CBRAM) based switch matrix. The switch matrix with a crossbar structure is implemented easily by spin-coating process, compatible with the packaging technology of high-resistivity silicon interposer. The equivalent circuit model is established. A
${2}\times {2}$
switch matrix prototype is developed with the insertion loss below 3.8 dB for arbitrary transmission path from DC to 67 GHz. The fabricated
${4}\times {4}$
switch matrix prototype achieves the 3-dB bandwidth over DC to 30 GHz. Under the data rate of 30 Gbps and the rise time of 15 ps, the near- and far-end crosstalks are all below 3% of the input signal swing, the eye height is 71%, and the root-mean-square jitter is only 1.26 ps. Noting that the CBRAM-based switch matrix consumes no static power, the proposed reconfigurable passive silicon interposer is a promising technology for flexible chiplet integration.
期刊介绍:
IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.