Overlay Measurement Algorithm for Moiré Targets Using Frequency Analysis

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Hyunchul Lee;Hyunjin Chang;Hosung Woo;WonGu Lee
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引用次数: 0

Abstract

The miniaturization of semiconductor chips creates discrepancies between the designed node size and physical values. It has resulted in a tightened on-product overlay (OPO) budget and increased the demand for improved measurement noise reduction and accuracy in optical systems. A solution utilizing moiré targets can address such challenges by enabling the amplification of small misalignments that cannot be achieved with conventional overlay targets using an image-based overlay (IBO) estimator. However, moiré patterns formed within a layer introduce noise sources and problems owing to interference from the reflected light, adversely affecting the precision of overlay measurements and limiting the effective utilization of moiré patterns. We investigate the problems associated with moiré patterns in the IBO measurement method and propose a novel overlay measurement algorithm to mitigate the problems. The proposed algorithm increases the accuracy of the filtering method in the spatial frequency domain and improves the overlay precision by approximately 2% compared with conventional measurement algorithms. The proposed low-frequency selection algorithm and signal indexing algorithm effectively address the challenges posed by high-frequency problems and signal strength degradation in moiré patterns. The proposed practical solution achieves more accurate overlay measurements in semiconductor manufacturing, enabling better control and optimization of chip fabrication processes.
利用频率分析的莫伊雷目标叠加测量算法
半导体芯片的微型化造成了设计节点尺寸与物理值之间的差异。这导致了产品叠加(OPO)预算的紧缩,并增加了对改进光学系统测量降噪和精度的需求。利用摩尔纹目标的解决方案可以应对这些挑战,因为它可以利用基于图像的叠加(IBO)估计器放大传统叠加目标无法实现的微小错位。然而,由于反射光的干扰,在层内形成的摩尔纹会带来噪声源和问题,从而对叠加测量的精度产生不利影响,并限制了对摩尔纹的有效利用。我们研究了 IBO 测量方法中与摩尔纹相关的问题,并提出了一种新型叠加测量算法来缓解这些问题。与传统测量算法相比,所提出的算法提高了滤波方法在空间频率域的精度,并将叠加精度提高了约 2%。所提出的低频选择算法和信号索引算法有效地解决了摩尔纹中的高频问题和信号强度衰减所带来的挑战。所提出的实用解决方案可在半导体制造中实现更精确的叠加测量,从而更好地控制和优化芯片制造工艺。
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来源期刊
IEEE Transactions on Semiconductor Manufacturing
IEEE Transactions on Semiconductor Manufacturing 工程技术-工程:电子与电气
CiteScore
5.20
自引率
11.10%
发文量
101
审稿时长
3.3 months
期刊介绍: The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components, especially very large scale integrated circuits (VLSI). Manufacturing these products requires precision micropatterning, precise control of materials properties, ultraclean work environments, and complex interactions of chemical, physical, electrical and mechanical processes.
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