A Novel Parallel In-Memory Logic Array Based on Programmable Diodes

IF 2 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Jiabao Ye;Junyu Zhu;Jifang Cao;Haoxiong Bi;Yong Ding;Bing Chen
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引用次数: 0

Abstract

Computing-In-Memory (CIM) is widely applied in neural networks due to its unique capability to perform multiply-and-accumulate operations within a circuit array. This process directly obtains the current value through the product of voltage and conductance, accumulating it on the bit line, thus realizing storage and computing functionalities simultaneously within a single array. This significantly reduces the power consumption and time delay in data processing. Unfortunately, implementing general-purpose logic computations in large-scale memory arrays with CIM remains a challenge. This paper introduced a novel device concept, the programmable diode—a special type of memristor with a high switching window, ideally suited for memory arrays to reduce power consumption. A compact SPICE model was developed to enable circuit-level simulations in EDA tools. We also proposed a method to efficiently control the programmable diode for logic operations in memory arrays, and in this way, we constructed a parallel 8-bit full adder to verify the feasibility of the proposed method. Finally, based on the 8-bit full adder, we built a 5KB in-memory logic array capable of executing logic computations and simulated it using EDA tools. The simulation results demonstrated that the 5KB in-memory logic array can perform fundamental Boolean logic and arithmetic operations with high repeatability and parallelism, perfectly realizing the functionality of in-memory logic computation. Our work can provide a feasible scheme for realizing large-scale general logic computation systems based on CIM.
基于可编程二极管的新型并行内存逻辑阵列
内存计算(CIM)因其在电路阵列中执行乘法和累加运算的独特能力而被广泛应用于神经网络。这一过程通过电压和电导的乘积直接获得电流值,并将其累加到位线上,从而在单个阵列中同时实现存储和计算功能。这大大降低了数据处理的功耗和时间延迟。遗憾的是,利用 CIM 在大规模存储器阵列中实现通用逻辑运算仍是一项挑战。本文介绍了一种新型器件概念--可编程二极管--一种具有高开关窗口的特殊类型忆阻器,非常适合用于降低功耗的存储器阵列。我们开发了一个紧凑的 SPICE 模型,以便在 EDA 工具中进行电路级仿真。我们还提出了一种在存储器阵列中有效控制可编程二极管进行逻辑运算的方法,并以此构建了一个并行 8 位全加法器来验证所提方法的可行性。最后,在 8 位全加法器的基础上,我们构建了一个能够执行逻辑运算的 5KB 内存逻辑阵列,并使用 EDA 工具对其进行了仿真。仿真结果表明,5KB 内存逻辑阵列能以高重复性和并行性执行基本的布尔逻辑和算术运算,完美地实现了内存逻辑运算的功能。我们的工作为实现基于 CIM 的大规模通用逻辑计算系统提供了可行方案。
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来源期刊
IEEE Journal of the Electron Devices Society
IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology
CiteScore
5.20
自引率
4.30%
发文量
124
审稿时长
9 weeks
期刊介绍: The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.
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