All-Regions Damage Extraction Method for SiC IGBTs Based on C-V Curves

Abstract

SiC IGBTs take the advantages of high breakdown voltage and high conduction current, being a new type of power device with great application prospects in power transmission fields. However, foreseeable stress conditions such as gate stress, irradiation, and bipolar conduction may cause damage to the gate oxide and the epitaxial layer of SiC IGBTs, leading to degradation. Analysis of the device capacitance components shows that the damages in the gate oxide and the epitaxial layer results in variations in the gate capacitance and the substrate junction capacitance before and after enduring a stress. Therefore, the all-regions damage extraction method for SiC IGBT based on C-V curves is proposed for the first time. This method divides the ${C}_{\text {G}}$ - ${V}_{\text {G}}$ curve of SiC IGBT into six parts, whose shifts can reflect the damages in the gate oxide damage and epitaxial layer, respectively. Furthermore, the polarity and the degree of the damages can be extracted based on the direction and magnitude of the drift in the ${C}_{\text {G}}$ - ${V}_{\text {G}}$ curve. Moreover, by analyzing the drift in the ${C}_{\text {GC}}$ - ${V}_{\text {CE}}$ and $\text {1/}{C}_{\text {GC}}^{{2}}$ - ${V}_{\text {CE}}$ curves before and after stress, the more accurate extraction of the density and localization of defect introduced in epitaxial layer can be achieved.