Dimension Influence on the Interface Fatigue Characteristics of Three-Dimensional TSV Array: A Fully Coupled Thermal-Electrical-Structural Analysis

IF 2.5 3区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Transactions on Device and Materials Reliability Pub Date : 2024-09-03 DOI:10.1109/TDMR.2024.3453923

Kaihong Hou;Zhengwei Fan;Shufeng Zhang;Yashun Wang;Xun Chen

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引用次数: 0

Abstract

As the interconnected structure of 3D chip, through-silicon via undertakes the key functions in energy transmission, mechanical support and signal transmission of 3D chip. With the increasing of TSV interconnection density, the reliability of TSV is becoming increasingly prominent, and the slight variation of TSV dimension may exert severe impact on the fatigue life of the TSV array. In this study, a typical double-layer TSV interconnected 3D array is built to carried out the multi-interface fatigue analysis under thermoelectric structure coupling field, the influence of different dimension of the TSV interconnected array on the fatigue life of various interface and whole thermoelectric circuit are deeply investigated. Results shows that: 1) relatively small or large diameter of TSV-Cu or Bump can effectively improve the fatigue life of Bump-RDL interface. 2) The fatigue life of the top interface between TSV-Cu and SiO2 layer is slightly higher than that of the bottom interface. 3) The optimal dimension combination of TSV interconnected array is highly related with external working environment and own working state. Under the condition of this study, the dimension corresponding to Case 0 (TSV-Cu diameter:

$5~\mu $

m, Bump diameter:

$10~\mu $

m, Pitch:

$100~\mu $

m, SiO2 layer thickness:

$1~\mu $

m) is the optimal solution. 4) TSV-Cu diameter and SiO2 thickness have the greatest influence on the fatigue life of TSV array. Relevant results can provide valuable references for locating the weak points of the TSV interconnected array and the subsequent optimization design.

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尺寸对三维 TSV 阵列界面疲劳特性的影响：热、电、结构全耦合分析

硅通孔作为三维芯片的互联结构，承担着三维芯片能量传输、机械支撑和信号传输的关键功能。随着TSV互连密度的增加，TSV的可靠性日益突出，TSV尺寸的微小变化可能会对TSV阵列的疲劳寿命产生严重影响。本研究构建了典型的双层TSV互连三维阵列，开展了热电结构耦合场下的多界面疲劳分析，深入研究了TSV互连阵列不同尺寸对各界面和整个热电电路疲劳寿命的影响。结果表明：1)较小或较大的TSV-Cu或Bump直径都能有效提高Bump- rdl界面的疲劳寿命。2) TSV-Cu与SiO2层顶部界面的疲劳寿命略高于底部界面。3) TSV互联阵列的最优尺寸组合与外部工作环境和自身工作状态高度相关。在本研究条件下，Case 0对应的尺寸（TSV-Cu直径：$5~\mu $ m， Bump直径：$10~\mu $ m, Pitch: $100~\mu $ m， SiO2层厚度：$1~\mu $ m）为最优解。4) TSV- cu直径和SiO2厚度对TSV阵列的疲劳寿命影响最大。相关结果可为TSV互联阵列的弱点定位及后续优化设计提供有价值的参考。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Device and Materials Reliability 工程技术-工程：电子与电气

CiteScore

4.80

自引率

5.00%

发文量

审稿时长

6-12 weeks

期刊介绍： The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.