An Efficient Dynamic Threshold Voltage Detection Scheme for Improving 3-D NAND Flash Reliability

IF 2.5 3区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Transactions on Device and Materials Reliability Pub Date : 2024-09-02 DOI:10.1109/TDMR.2024.3453329

Linxin Yin;Yingzhao Li;Xiaoyi Zhang;Xiongfei Zhai;Guojun Han

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引用次数: 0

Abstract

With high storage density and large capacity, three-dimensional (3D) NAND flash utilizing multi-level storage technology has become the mainstream storage medium. Furthermore, by storing multiple bits in each flash cell, 3D NAND flash memory can achieve much larger storage capacity. However, the threshold voltage distribution in 3D NAND flash memory tends to shift after repeated program/erase and long retention time, leading to more detection error when adopting conventional fixed read reference voltage (RRV). To address this issue, in this work we investigate error characteristics of 3D floating-gate (FG) and charge-trap (CT) NAND flash memory, including the reliability variations of different layers and pages, and threshold voltage shifting. We propose an efficient dynamic threshold voltage detection (EDTVD) scheme by exploiting the error characteristics and the features of the data writing process of NAND flash to optimize RRV. Based on the Nanocycler test platform, the test results show that our proposed scheme can significantly reduce raw bit error rates (RBER) during reading processes and the step count is relatively low. The RBER of the EDTVD scheme is almost equal to the optimal read scheme, and the number of step count is close to 3 fixed-step read scheme.

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提高 3D NAND 闪存可靠性的高效动态阈值电压检测方案

采用多级存储技术的三维NAND闪存具有高存储密度和大容量，已成为主流存储介质。此外，通过在每个闪存单元中存储多个比特，3D NAND闪存可以实现更大的存储容量。然而，3D NAND闪存的阈值电压分布在重复编程/擦除和长保留时间后容易发生偏移，导致采用传统的固定读参考电压（RRV）时检测误差较大。为了解决这一问题，我们研究了3D浮栅（FG）和电荷阱（CT） NAND闪存的误差特性，包括不同层和页的可靠性变化以及阈值电压移动。利用NAND闪存的误差特性和数据写入过程的特点，提出一种有效的动态阈值电压检测（EDTVD）方案来优化RRV。基于Nanocycler测试平台的测试结果表明，该方案可以显著降低读取过程中的原始误码率（RBER），且步长较低。EDTVD方案的RBER几乎等于最优读取方案，且步数接近3个固定步长读取方案。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Device and Materials Reliability 工程技术-工程：电子与电气

CiteScore

4.80

自引率

5.00%

发文量

审稿时长

6-12 weeks

期刊介绍： The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.