Machine Learning-Based Compact Modeling of Silicon Cold Source Field-Effect Transistors

Abstract

The Silicon cold source field-effect transistor (CSFET) offers a compelling solution for low-power logic devices due to its ability to achieve sub-60 mV/dec steep-slope switching with innovative source engineering, while maintaining compatibility with Silicon CMOS technology. Developing a compact model for CSFETs is crucial for advancing our understanding of these novel devices and enabling advanced design and simulation based on CSFETs. To this end, this work introduces a compact model specifically designed for n-type double-gate CSFETs. Employing the Landauer-Büttiker approach alongside machine learning (ML)-based band energy profiles, our model accounts for thermal current via ballistic transport and tunneling current from source-to-drain direct tunneling. Consequently, our model accurately represents the drain current-gate voltage relationship in CSFETs. Furthermore, our proposed model is applicable to both CSFETs and conventional MOSFETs. This enables benchmarking analysis between CSFETs and conventional MOSFETs, shedding light on their comparative performance metrics.