Effective Reduction of Hydrogen Diffusion and Reliability Degradation in Peripheral Transistor of Peripheral-Under-Cell (PUC) NAND Flash Memory

IF 2 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Eunyoung Park;Hyun-Yong Yu
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Abstract

Recently, a new structure called PUC has been introduced, in which the periphery is located below the NAND cell to reduce chip area. However, as the SiN-based cell alloy process progresses during the NAND manufacturing process, there is a problem in that excess hydrogen is injected into the peripheral transistor, resulting in degradation of reliability. Therefore, we propose the hydrogen diffusion model in PUC to investigate the degradation of peripheral transistor by excess hydrogen using Sentaurus 3D technology Computer-Aided Design (TCAD) and suggest an optimal process to improve reliability. As a result, by applying the bonding process and adjusting the cell alloy process sequence, the amount of excess hydrogen injection is reduced by 87% and the NBTI lifetime showed about 8.3 times greater result and TDDB breakdown time improved more than 9.1 times compared to the PUC structure made through a sequential process. Additionally, this process effectively alleviates excess hydrogen injection in the NAND cell with an increased number of WL. These results could provide critical insight for designing a PUC that ensures the reliability of peripheral transistor.
有效减少外设单元下 (PUC) NAND 闪存外设晶体管中的氢扩散和可靠性退化
最近,一种名为 PUC 的新结构问世,它将外围位于 NAND 单元下方,以减少芯片面积。然而,随着基于 SiN 的单元合金工艺在 NAND 制造过程中的发展,出现了过量氢气注入外围晶体管的问题,导致可靠性下降。因此,我们提出了 PUC 中的氢扩散模型,利用 Sentaurus 3D 技术计算机辅助设计(TCAD)研究过量氢对外围晶体管的降解,并提出了提高可靠性的最佳工艺。结果,通过采用键合工艺和调整电池合金工艺顺序,过量氢注入量减少了 87%,与顺序工艺制作的 PUC 结构相比,NBTI 寿命提高了约 8.3 倍,TDDB 击穿时间提高了 9.1 倍以上。此外,随着 WL 数量的增加,该工艺还能有效缓解 NAND 单元中过量的氢注入。这些结果为设计能确保外围晶体管可靠性的 PUC 提供了重要启示。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Journal of the Electron Devices Society
IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology
CiteScore
5.20
自引率
4.30%
发文量
124
审稿时长
9 weeks
期刊介绍: The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.
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