Plasma-Enhanced Atomic Layer Deposition-Based Ferroelectric Field-Effect Transistors

IF 2 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of the Electron Devices Society Pub Date : 2024-07-29 DOI:10.1109/JEDS.2024.3434598

Chinsung Park;Prasanna Venkat Ravindran;Dipjyoti Das;Priyankka Gundlapudi Ravikumar;Chengyang Zhang;Nashrah Afroze;Lance Fernandes;Yu Hsin Kuo;Jae Hur;Hang Chen;Mengkun Tian;Winston Chern;Shimeng Yu;Asif Islam Khan

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引用次数: 0

Abstract

The use of the plasma-enhanced atomic layer deposition (ALD) technique for the deposition of HfO2-based ferroelectrics has received attention in recent years primarily due to wake-up free operation. However, these studies have primarily focused on metal-ferroelectric-metal (MFM) structures. In this work, we investigate the characteristics of ferroelectric field-effect transistors (FEFETs) in which the ferroelectric Hf0.5Zr0.5O2 (HZO) gate stack is deposited using the plasma-enhanced atomic layer deposition (PEALD) technique. We observe that PEALD FEFET requires a higher write voltage for the same memory window compared to an equivalent FEFET with thermal ALD (THALD)-grown HZO. The increase in write voltage in PEALD FEFET occurs primarily due to the increase of the interfacial oxide layer using the plasma process. In addition, we observe that the SiO2 interfacial layer underneath the ferroelectric (FE) HZO layer eliminates the wake-up behavior in both THALD and PEALD FEFETs.

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基于等离子体增强原子层沉积的铁电场效应晶体管

近年来，使用等离子体增强原子层沉积（ALD）技术沉积基于 HfO2 的铁电体受到关注，这主要是由于该技术可实现无唤醒操作。然而，这些研究主要集中在金属-铁电-金属（MFM）结构上。在这项工作中，我们研究了使用等离子体增强原子层沉积（PEALD）技术沉积铁电 Hf0.5Zr0.5O2（HZO）栅叠层的铁电场效应晶体管（FEFET）的特性。我们发现，与采用热原子层沉积（THALD）生长 HZO 的等效 FEFET 相比，PEALD FEFET 需要更高的写入电压才能实现相同的存储窗口。PEALD FEFET 写入电压的增加主要是由于使用等离子工艺增加了界面氧化层。此外，我们还观察到，铁电 (FE) HZO 层下的二氧化硅界面层消除了 THALD 和 PEALD FEFET 的唤醒行为。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology

CiteScore

5.20

自引率

4.30%

发文量

124

审稿时长

9 weeks

期刊介绍： The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.