Memristor Crossbar Array Simulation for Deep Learning Applications

Abstract

Hardware neural networks (HNNs) based on crossbar arrays are expected to be energy-efficient computing architectures for solving complex tasks due to their small feature sizes. Although there exist software libraries able to deal with circuit simulation of memristor networks, they still exceed the memory available of any consumer grade GPU's VRAM for large scale crossbar arrays while having a significant computational complexity. This work discusses an iterative method to implement a fast simulation of the corresponding memristor crossbar array with much more limited memory use.