Single-Event Burnout Effects of Complementary LDMOS Devices in High-Voltage Integrated Circuits

IF 2.5 3区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Transactions on Device and Materials Reliability Pub Date : 2024-06-28 DOI:10.1109/TDMR.2024.3420391

Chonghao Chen;Jiang Xu;Zhuojun Chen

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引用次数: 0

Abstract

Lateral diffused metal-oxide-semiconductor (LDMOS) devices are vulnerable to single-event burnout (SEB) in radiation environments, potentially leading to catastrophic failure in high-voltage integrated circuits (HVICs). Pulsed-laser experiments have demonstrated that the SEB triggering voltage of n-type LDMOS (nLDMOS) is significantly lower than that of p-type LDMOS (pLDMOS), which limits the applications of complementary LDMOS devices in aerospace electronic systems. This work investigates the SEB mechanism in both nLDMOS and pLDMOS through technology computer-aided design (TCAD) simulations. The analysis reveals that differences in the current gain of parasitic bipolar transistors and well resistance between pLDMOS and nLDMOS result in varying SEB triggering voltages. Additionally, a radiation-hardening technique is employed to improve the SEB triggering voltage of nLDMOS, aligning it closely with that of pLDMOS. This research provides insight into the design of radiation-hardened high-voltage integrated circuits, such as DC-DC converters and motor drivers, using a standard Bipolar-CMOS-DMOS (BCD) fabrication process.

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高压集成电路中互补 LDMOS 器件的单次烧毁效应

侧向扩散金属氧化物半导体（LDMOS）器件在辐射环境中容易发生单次烧毁（SEB），可能导致高压集成电路（HVIC）发生灾难性故障。脉冲激光实验证明，n 型 LDMOS（nLDMOS）的 SEB 触发电压明显低于 p 型 LDMOS（pLDMOS），这限制了互补 LDMOS 器件在航空航天电子系统中的应用。这项工作通过技术计算机辅助设计（TCAD）模拟研究了 nLDMOS 和 pLDMOS 中的 SEB 机制。分析表明，寄生双极晶体管的电流增益以及 pLDMOS 和 nLDMOS 之间的阱电阻差异会导致不同的 SEB 触发电压。此外，还采用了辐射硬化技术来改善 nLDMOS 的 SEB 触发电压，使其与 pLDMOS 的触发电压接近。这项研究为使用标准双极-CMOS-DMOS（BCD）制造工艺设计直流-直流转换器和电机驱动器等辐射加固型高压集成电路提供了启示。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Device and Materials Reliability 工程技术-工程：电子与电气

CiteScore

4.80

自引率

5.00%

发文量

审稿时长

6-12 weeks

期刊介绍： The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.