Optimization of novel two-step curing method for die stack epoxy bonding to reduce voids in Ball Grid Array packages for high-density interconnect applications
IF 1.6 4区 工程技术Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Qian Qing Ng , Chou Yong Tan , Yew Hoong Wong , Boon Kar Yap , Farazila B. Yusof , Saim Saher
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引用次数: 0
Abstract
This research explores the optimization of epoxy curing parameters to minimize void formation in 3-IC-Chip-MAPBGA packages, a subset of BGA packages, crucial components in high-density interconnect applications. The study utilizes a systematic approach involving design of experiments (DOE) assisted by statistical JMP tool to manipulate curing profiles, aiming to achieve void reduction while preserving adhesion properties. Various analytical techniques, including X-ray imaging, differential scanning calorimetry (DSC), thermogravimetric analysis (TGA), die shear strength tests, and C-Sam analysis for delamination, are employed to analyze void formation, material characteristics, mechanical properties, and structural integrity. The findings demonstrate that the sample with a 2nd step curing profile, identified as sample#3, which includes a ramp time of 15 min, a 1st step curing temperature of 90 °C with a soak time of 20 min, and a 2nd step ramp time of 20 min, exhibits the most favourable outcome in void reduction. This sample shows a notably lower void presence of 3.66 % and the highest die shear strength of 126 MPa. In contrast, the control sample, serving as a reference, displays a void percentage of 7.28 %, nearly twice as high as that of sample#3, and much lower die shear strength of 80 MPa at 25 °C. Adopting the curing profile of sample#3 also leads to a substantial 18.75 % reduction in cycle time compared to the control sample. The study highlights the importance of balancing curing parameters to mitigate void formation and maintain optimal mechanical properties, offering valuable insights for improving the reliability of high-density interconnect applications.
期刊介绍:
Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged.
Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.