An 18-nW CMOS Current and Voltage Reference Circuit With Low Line Sensitivity and Wide Temperature Range

Abstract

This letter presents a design for a voltage and current reference (VCR) that utilizes a 0.18- $\mu $ m CMOS process. The design employs stacked-diode MOS transistors (SDMTs) to generate a voltage that is complementary to absolute temperature for the current reference (CR). By adjusting the transistor size ratio, this bias voltage exhibits the similar temperature coefficient (TC) as that of the resistor in the CR. To enhance temperature compensation, a reversely biased transistor is employed in the voltage reference (VR). Additionally, the cascode current mirror and SDMTs in the VR mitigate supply sensitivity in both voltage and current outputs. The VCR achieves a TC of 124 ppm/°C in VR and 264 ppm/°C in CR over a temperature range of $- 40~^{\circ }$ C to $130~^{\circ }$ C. Furthermore, it achieves a line sensitivity of 0.011 %/V in VR and 0.094 %/V in CR while operating at 18.51 nW at room temperature. The active chip area of the VCR is approximately $25~000~\mu $ m2.