Threshold voltage in FD-SOI MOSFETs

IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Georges Pananakakis, Gérard Ghibaudo, Sorin Cristoloveanu
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引用次数: 0

Abstract

The threshold voltage definition and measurement in ultrathin FD-SOI MOS transistors are revisited by comparing theoretical and pragmatic extraction techniques, including novel approaches. The respective merits and limitations of methods based on the monitoring of the potential, mobile charge, gate-to-channel capacitance and drain current are emphasized. Back-gate biasing, thickness-induced quantization, potential fluctuations and surface roughness can enhance the disparity between various extraction methods. The origin of these deviations is clarified.

FD-SOI MOSFET 的阈值电压
通过比较理论和实际提取技术(包括新方法),重新审视了超薄 FD-SOI MOS 晶体管中阈值电压的定义和测量。强调了基于监测电位、移动电荷、栅极到沟道电容和漏极电流的方法各自的优点和局限性。后栅偏压、厚度引起的量化、电位波动和表面粗糙度会加剧各种提取方法之间的差异。这些偏差的根源已得到澄清。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Solid-state Electronics
Solid-state Electronics 物理-工程:电子与电气
CiteScore
3.00
自引率
5.90%
发文量
212
审稿时长
3 months
期刊介绍: It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.
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