Aging Reliability Compact Modeling of Trap Effects in Power GaN HEMTs

IF 2.5 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Yanfeng Ma;Sheng Li;Mengli Liu;Weihao Lu;Mingfei Li;Siyang Liu;Long Zhang;Jiaxing Wei;Lanlan Yang;Weifeng Sun;Jiaxin Sun
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Abstract

This article proposes an aging reliability compact model with high accuracy to simulate trap effects after long-term aging in power Gallium Nitride (GaN) based high electron mobility transistors (HEMTs). Dynamic on-state resistance $(R_{\mathrm{ on,dy}})$ caused by trap effects is taken as an example to deliver the aging reliability modeling concepts and flows. Based on the mechanism of trap effects and accelerated-stress experiments, the variation model of electron mobility has been established, so that the degradation of $R_{\mathrm{ on,dy}}$ after aging can be predicted. The structure of the advanced SPICE model for GaN HEMT (ASM-HEMT) is modified to integrate the mobility variation model into SPICE for convenient usage. In addition, the accuracy of the proposed model has been verified, and the RMSE value between measured data and simulated data under long-term high temperature reverse bias stress conditions is only 1.68%, thus the hazard of the power system caused by traps can be discovered and avoided in advance.
功率 GaN HEMT 中陷阱效应的老化可靠性紧凑建模
本文提出了一种高精度老化可靠性紧凑模型,用于模拟基于氮化镓(GaN)的功率高电子迁移率晶体管(HEMT)长期老化后的陷阱效应。以陷阱效应引起的动态导通电阻 $(R_{\mathrm{ on,dy}})$ 为例,介绍老化可靠性建模的概念和流程。基于陷阱效应的机理和加速应力实验,建立了电子迁移率的变化模型,从而可以预测老化后 $R_{\mathrm{ on,dy}}$ 的衰减情况。对 GaN HEMT 高级 SPICE 模型(ASM-HEMT)的结构进行了修改,以便将迁移率变化模型集成到 SPICE 中,方便使用。此外,还验证了所提模型的准确性,在长期高温反向偏压应力条件下,测量数据与模拟数据之间的均方根误差值仅为 1.68%,因此可以提前发现并避免陷阱对电力系统造成的危害。
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来源期刊
IEEE Transactions on Device and Materials Reliability
IEEE Transactions on Device and Materials Reliability 工程技术-工程:电子与电气
CiteScore
4.80
自引率
5.00%
发文量
71
审稿时长
6-12 weeks
期刊介绍: The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.
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