Machine Learning-Based Compact Model Design for Reconfigurable FETs

IF 2 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Maximilian Reuter;Johannes Wilm;Andreas Kramer;Niladri Bhattacharjee;Christoph Beyer;Jens Trommer;Thomas Mikolajick;Klaus Hofmann
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引用次数: 0

Abstract

In integrated circuit design compact models are the abstraction layer which connects semiconductor physics and circuit simulation. Established compact models like BSIM provide a powerful platform for many kinds of conventional MOSFETs. However, novel device concepts like reconfigurable FETs (RFETs) come with a higher expressiveness. Due to their altered transport physics as compared to classical inversion mode MOSFETs those devices are hard to describe in a closed form expression by classical compact models. Table models bridge this gap for devices with novel features or materials, but circuit simulation becomes slow and inaccurate due to interpolation and convergence difficulties. Table model data can, however, be translated to closed form expressions, providing equation based models without the need for interpolation during simulation time. This work shows data driven approaches to generate compact models from biasing tables without physical analysis of the device behavior. Two automated modeling techniques are applied to a recently emerged RFET, forming a Verilog-A compact model for DC and transient simulation in Cadence Virtuoso. Drive current is implemented as a neural network, large enough to accurately predict behavior of a multi-gate device. The high dynamic range from $mA$ to $pA$ is covered by combining a linear model for high currents and a logarithmic model for low currents. For transient simulation precise models for electrode charges are essential. Here, symbolic regression provides human-readable closed form expressions which allow direct implementation in Verilog-A. The compact model approach is demonstrated with device data generated from a structural technology model (TCAD). However, the entire modeling flow can directly be used on real device measurements, if a technology model is unavailable or unpractical. We show that the presented machine learning based compact models show better convergence, more accurate predictions and faster simulation $(82$ to 308 times) in Cadence SPECTRE than simple table models generated from the same device.
基于机器学习的可重构 FET 紧凑型模型设计
在集成电路设计中,紧凑型模型是连接半导体物理和电路仿真的抽象层。BSIM 等成熟的紧凑模型为多种传统 MOSFET 提供了强大的平台。然而,可重构场效应晶体管(RFET)等新型器件概念需要更高的表现力。与经典反转模式 MOSFET 相比,这些器件的传输物理特性发生了改变,因此很难用经典紧凑模型的封闭式表达来描述。表模型为具有新特征或新材料的器件弥补了这一缺陷,但由于插值和收敛困难,电路仿真变得缓慢和不准确。然而,表模型数据可以转化为封闭式表达式,提供基于方程的模型,而无需在仿真过程中进行插值。这项工作展示了无需对器件行为进行物理分析就能从偏置表生成紧凑模型的数据驱动方法。两种自动建模技术被应用于最近出现的射频晶体管,在 Cadence Virtuoso 中形成了用于直流和瞬态仿真的 Verilog-A 紧凑模型。驱动电流以神经网络的形式实现,其规模足以准确预测多栅极器件的行为。通过结合大电流的线性模型和小电流的对数模型,可以覆盖从 $mA$ 到 $pA$ 的高动态范围。对于瞬态模拟,精确的电极电荷模型至关重要。在这里,符号回归提供了人类可读的封闭式表达式,可以直接在 Verilog-A 中实现。通过结构技术模型 (TCAD) 生成的器件数据,演示了紧凑模型方法。不过,如果没有技术模型或技术模型不实用,整个建模流程也可直接用于真实设备测量。我们的研究表明,在 Cadence SPECTRE 中,与从相同器件生成的简单表格模型相比,所介绍的基于机器学习的紧凑模型具有更好的收敛性、更准确的预测和更快的仿真速度(82 到 308 倍)。
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来源期刊
IEEE Journal of the Electron Devices Society
IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology
CiteScore
5.20
自引率
4.30%
发文量
124
审稿时长
9 weeks
期刊介绍: The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.
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