Rilwan Kayode Apalowo, Mohamad Aizat Abas, Zuraihana Bachok, Mohamad Fikri Mohd Sharif, Fakhrozi Che Ani, Mohamad Riduwan Ramli, Muhamed Abdul Fatah bin Muhamed Mukhtar
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引用次数: 0
Abstract
Purpose
This study aims to investigate the possible defects and their root causes in a soft-termination multilayered ceramic capacitor (MLCC) when subjected to a thermal reflow process.
Design/methodology/approach
Specimens of the capacitor assembly were subjected to JEDEC level 1 preconditioning (85 °C/85%RH/168 h) with 5× reflow at 270°C peak temperature. Then, they were inspected using a 2 µm scanning electron microscope to investigate the evidence of defects. The reliability test was also numerically simulated and analyzed using the extended finite element method implemented in ABAQUS.
Findings
Excellent agreements were observed between the SEM inspections and the simulation results. The findings showed evidence of discontinuities along the Cu and the Cu-epoxy layers and interfacial delamination crack at the Cu/Cu-epoxy interface. The possible root causes are thermal mismatch between the Cu and Cu-epoxy layers, moisture contamination and weak Cu/Cu-epoxy interface. The maximum crack length observed in the experimentally reflowed capacitor was measured as 75 µm, a 2.59% difference compared to the numerical prediction of 77.2 µm.
Practical implications
This work's contribution is expected to reduce the additional manufacturing cost and lead time in investigating reliability issues in MLCCs.
Originality/value
Despite the significant number of works on the reliability assessment of surface mount capacitors, work on crack growth in soft-termination MLCC is limited. Also, the combined experimental and numerical investigation of reflow-induced reliability issues in soft-termination MLCC is limited. These cited gaps are the novelties of this study.
期刊介绍:
Microelectronics International provides an authoritative, international and independent forum for the critical evaluation and dissemination of research and development, applications, processes and current practices relating to advanced packaging, micro-circuit engineering, interconnection, semiconductor technology and systems engineering. It represents a current, comprehensive and practical information tool. The Editor, Dr John Atkinson, welcomes contributions to the journal including technical papers, research papers, case studies and review papers for publication. Please view the Author Guidelines for further details.
Microelectronics International comprises a multi-disciplinary study of the key technologies and related issues associated with the design, manufacture, assembly and various applications of miniaturized electronic devices and advanced packages. Among the broad range of topics covered are:
• Advanced packaging
• Ceramics
• Chip attachment
• Chip on board (COB)
• Chip scale packaging
• Flexible substrates
• MEMS
• Micro-circuit technology
• Microelectronic materials
• Multichip modules (MCMs)
• Organic/polymer electronics
• Printed electronics
• Semiconductor technology
• Solid state sensors
• Thermal management
• Thick/thin film technology
• Wafer scale processing.