Analysis of Mechanical Stress on Fowler-Nordheim Tunneling for Program Operation in 3D NAND Flash Memory

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2024-03-30 DOI:10.1016/j.sse.2024.108927

Donghyun Kim , Kihoon Nam , Chanyang Park , Hyunseo You , Min Sang Park , Yunsu Kim , Seongjo Park , Rock-Hyun Baek

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引用次数: 0

Abstract

This study investigated the relationship between mechanical stress and program efficiency in three-dimensional (3D) NAND flash memory devices. A stacked memory array transistor (SMArT) 3D NAND flash structure was modeled using a technology computer-aided design (TCAD) simulation. The mechanical stress distribution in the device depended on the deposition temperature (T_D) of the constituent material. In particular, the T_D of tungsten (T_D,W) dominated the mechanical stress. The tensile stress on the polycrystalline silicon (poly-Si) channel increased as the T_D,W decreased, and the compressive stress on the tunneling oxide (T_ox) decreased. Consequently, the barrier height between T_ox and poly-Si, and the effective electron mass decreased as the electric field in the T_ox increased. These changes significantly increased the Fowler-Nordheim (FN) tunneling process and program efficiency, indicating the crucial performance of 3D NAND flash. Moreover, the mechanical stress caused by the differences in T_D,W improved the program efficiency at a lower program voltage (V_PGM). Therefore, a change in the mechanical stress based on decreasing T_D,W improved the program efficiency through a higher FN tunneling process.

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三维 NAND 闪存中程序运行的机械应力对 Fowler-Nordheim 隧道效应的影响分析

本研究探讨了三维（3D）NAND 闪存设备中机械应力与程序效率之间的关系。使用技术计算机辅助设计（TCAD）仿真模拟了堆叠存储阵列晶体管（SMArT）三维 NAND 闪存结构。器件中的机械应力分布取决于组成材料的沉积温度（TD）。其中，钨的沉积温度（TD,W）在机械应力中占主导地位。多晶硅（poly-Si）沟道上的拉伸应力随着 TD,W 的降低而增加，隧道氧化物（Tox）上的压缩应力则降低。因此，Tox 和多晶硅之间的势垒高度以及有效电子质量随着 Tox 中电场的增加而降低。这些变化大大提高了 Fowler-Nordheim (FN) 隧道过程和程序效率，显示了 3D NAND 闪存的关键性能。此外，TD,W 的差异造成的机械应力提高了较低编程电压（VPGM）下的编程效率。因此，在降低 TD,W 的基础上改变机械应力，可以通过更高的 FN 隧道过程提高程序效率。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.