Impact of JFET width on conduction characteristic for p-channel SiC IGBT

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2024-03-26 DOI:10.1016/j.sse.2024.108907

Kunhui Xu , Xiaoli Tian , Wei Wei , Xinhua Wang , Yun Bai , Chengyue Yang , Yidan Tang , Chengzhan Li , Xinyu Liu , Hong Chen

引用次数: 0

Abstract

In this article, the mechanism analysis of the impact of the L_JFET on the conduction characteristic of SiC IGBT is verified through simulation results and actual tests. Planar p-channel SiC IGBTs with different L_JFET including 3.2 μm, 10 μm, and 12 μm are fabricated and tested for trend verification, and test results are fit with simulation. Under the same conditions, when the L_JFET increases from 3 μm to 10 μm, the conduction characteristic is relatively improved. Moreover, the forward voltage drop degenerates when the L_JFET increases from 10 μm to 12 μm. When the gate voltage is −20 V, the forward voltage drop of the p-channel SiC IGBT at the current density of 100 A/cm² is −10.20 V. At the same time, the breakdown voltage reaches 10 kV.

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JFET 宽度对 p 沟道 SiC IGBT 传导特性的影响

本文通过仿真结果和实际测试验证了 LJFET 对 SiC IGBT 传导特性影响的机理分析。为了验证趋势，我们制作并测试了具有不同 LJFET（包括 3.2 μm、10 μm 和 12 μm）的平面 p 沟道 SiC IGBT，测试结果与仿真结果相吻合。在相同条件下，当 LJFET 从 3 μm 增加到 10 μm 时，传导特性相对得到改善。此外，当 LJFET 从 10 μm 增大到 12 μm 时，正向压降变小。当栅极电压为 -20 V 时，电流密度为 100 A/cm2 的 p 沟道 SiC IGBT 的正向压降为 -10.20 V。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.