CNC: A lightweight architecture for Binary Ring-LWE based PQC

Abstract

In lattice-based cryptography, Ring Learning with Errors (RLWE) is a computationally hard cryptographic problem, comprising three basic mechanisms i.e., key generation, encryption, and decryption. Binary Ring Learning with Error (BRLWE), a new variant of RLWE has been proposed recently to reduce the key size and computational complexity compared to previous RLWE-based schemes. Based on this BRLWE scheme, efficient hardware architectures have been obtained in recent works for lightweight applications. The key operation involved in this scheme is $AB+C$ , where $A$ and $C$ are integer polynomials and $B$ is a binary polynomial. This paper proposes an efficient hardware architecture for BRLWE-based scheme targeted for lightweight applications. The architecture computes the arithmetic operation $AB+C$, which includes polynomial multiplication and addition over the polynomial ring $Z_q/(x^n+1)$. The proposed architecture is applied in two conditions, fixed and variable values of $q$. Experimental results show the architecture proposed has 50% less Area-Delay Product (ADP) and 20% less Power-Delay Product (PDP) compared to the recently reported work for $n=256$.