Unveiling the reliability of negative capacitance FinFET with confrontation of different HfO2-ferroelectric dopants

IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Rajeewa Kumar Jaisawal , Sunil Rathore , P.N. Kondekar , Navjeet Bagga
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引用次数: 0

Abstract

The CMOS compatibility of Negative Capacitance (NC) FETs has been enhanced tremendously after introducing a thin film-doped HfO2 as a ferroelectric (FE) layer. For a given FE layer, the NC property is governed by specific HfO2 dopants (e.g., La, Zr, Al, Sr, Gd, Y, and Si). Thus, the TCAD simulation considerably depends on the dopant-specific Landau parameters (αx,βx,γx,ρx,gx), and its solidity needs proper attention. Further, the reliability of the NC devices is severely affected by process variations, i.e., interface trap charges, work function variation, random dopant fluctuation, and ambient temperature (external), which modulates the device threshold voltage (Vth); in turn, the device aging. In this paper, using well-calibrated TCAD models, we investigated reliability for the different dopant-specific NC-FinFET, in terms of Vth, ON current (ION), and OFF current (IOFF) modulation induced by: (i) the interface trap variability (ITV) considering the different trap concentration and energy location; (ii) the work function variability (WFV) considering different metal grain sizes (Gr); (iii) the random dopant fluctuations (RDF); and (iv) the ambient temperature. In this way, the device aging is calculated by inspecting Vth shift by ±50mV. These investigations pave the path for realizing a reliable NC-FinFET design.

揭示负电容 FinFET 的可靠性与不同 HfO2-ferroelectric 掺杂物的对抗
在引入薄膜掺杂 HfO2 作为铁电(FE)层后,负电容(NC)场效应晶体管的 CMOS 兼容性得到了极大的提高。对于给定的铁电层,NC 特性受特定 HfO2 掺杂剂(如 La、Zr、Al、Sr、Gd、Y 和 Si)的影响。因此,TCAD 模拟在很大程度上取决于特定掺杂剂的朗道参数(αx,βx,γx,ρx,gx),其稳固性需要适当关注。此外,数控器件的可靠性受到工艺变化的严重影响,即界面阱电荷、功函数变化、随机掺杂波动和环境温度(外部),这些变化会调节器件阈值电压(Vth),进而影响器件老化。在本文中,我们利用校准良好的 TCAD 模型,从 Vth、导通电流 (ION) 和关断电流 (IOFF) 调制的角度,研究了不同掺杂剂的 NC-FinFET 的可靠性:(i) 考虑到不同阱浓度和能量位置的界面阱变异性 (ITV);(ii) 考虑到不同金属晶粒尺寸 (Gr) 的功函数变异性 (WFV);(iii) 随机掺杂波动 (RDF);以及 (iv) 环境温度。这样,通过检测 ±50mV 的 Vth 值偏移,就能计算出器件的老化程度。这些研究为实现可靠的 NC-FinFET 设计铺平了道路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
Solid-state Electronics
Solid-state Electronics 物理-工程:电子与电气
CiteScore
3.00
自引率
5.90%
发文量
212
审稿时长
3 months
期刊介绍: It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.
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