Program Start Bias Grouping to Compensate for the Geometric Property of a String in 3-D NAND Flash Memory

IF 2 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of the Electron Devices Society Pub Date : 2024-03-08 DOI:10.1109/JEDS.2024.3372971

Sungju Kim;Sangmin Ahn;Sechun Park;Jongwoo Kim;Hyungcheol Shin

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引用次数: 0

Abstract

The string (STR) with various geometrical profiles in 3-D NAND flash cause the degradation of program efficiency. This is because the program speed differences among WL layers within the STR are caused by the geometrical properties observed through measurement results. In this work, we propose the method to reduce the program speed differences based on a word-line (WL) grouping in terms of threshold voltage (Vth) distribution to compensate for the program start voltage (Vstart). To address various geometrical profiles, we consider a flexible compensation method through

$\Delta $

Peak_Vth, i.e., the net amount of movement from the erase to the program state.

$\Delta $

Peak_Vth according to WL layers clearly distinguished the geometrical properties among WL layers, and through this, the linearity of

$\Delta $

Peak_Vth is frequently observed for specific WL layer intervals with taper profile. Utilizing this linearity, we conducted the WL grouping and successfully demonstrated

$\text{V}_{\mathrm{ start}}$

compensation by applying the proposed method to each WL group through the measurement of a commercial 3-D NAND package. Moreover, the reduced WL grouping method is also contrived to relax circuit design complications and evaluated the usefulness of the proposed method.

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通过程序启动偏置分组补偿 3-D NAND 闪存中字符串的几何特性

3-D NAND 闪存中具有不同几何形状的字符串（STR）会导致程序效率下降。这是因为 STR 内各 WL 层之间的程序速度差异是由测量结果观察到的几何特性造成的。在这项工作中，我们根据阈值电压（Vth）分布提出了基于字线（WL）分组的减少程序速度差异的方法，以补偿程序启动电压（Vstart）。为了解决各种几何剖面问题，我们考虑通过 $\Delta $ Peak_Vth（即从擦除状态到编程状态的净移动量）来实现灵活的补偿方法。根据 WL 层划分的 $\Delta $ Peak_Vth 可以清楚地区分 WL 层之间的几何特性，通过这种方法，我们可以经常观察到 $\Delta $ Peak_Vth 在特定 WL 层间隔与锥形轮廓之间的线性关系。利用这种线性关系，我们对 WL 进行了分组，并通过测量商用 3-D NAND 封装，将所提出的方法应用于每个 WL 组，成功演示了 $\text{V}_{mathrm{ start}}$ 补偿。此外，还设计了减少 WL 分组的方法，以放宽电路设计的复杂性，并评估了所提方法的实用性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology

CiteScore

5.20

自引率

4.30%

发文量

124

审稿时长

9 weeks

期刊介绍： The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.