Stability of GaN HEMT Device Under Static and Dynamic Gate Stress

IF 2 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of the Electron Devices Society Pub Date : 2024-02-05 DOI:10.1109/JEDS.2024.3362048

Linfei Gao;Ze Zhong;Qiyan Zhang;Xiaohua Li;Xinbo Xiong;Shaojun Chen;Longkou Chen;Huaibao Yan;Anle Zhang;Jiajun Han;Wenrong Zhuang;Feng Qiu;Hsien-Chin Chiu;Shuangwu Huang;Xinke Liu

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引用次数: 0

Abstract

In this work, we investigated the stability of a

${p}$

-GaN gate with high electron mobility transistors (HEMTs) including an internal integrated gate circuit. A circuit was designed to improve

${p}$

-GaN gate stability by using capacitance to release the hole into the

${p}$

-GaN layer to mitigate the threshold voltage shift. Through pulse I-V measurement and positive bias temperature instability (PBTI) test, the carrier transporting behavior in the gate region achieved dynamic equilibrium at 5 V gate bias. The positive gate shift

$(\Delta V_{\mathrm{ TH}})$

of 0.4 V is observed with increasing voltage from 3 V to 8 V;

$\Delta V_{\mathrm{ TH}}$

initially drops smoothly after release stresses by external capacitance discharge. Finally, integrated passive components and

${p}$

-GaN gate HEMT circuit are recommended to mitigate the

$V_{\mathrm{ TH}}$

instability for E-mode HEMT.

查看原文本刊更多论文

GaN HEMT 器件在静态和动态栅极应力下的稳定性

在这项工作中，我们研究了具有高电子迁移率晶体管（HEMT）的{p}$ -GaN栅极的稳定性，包括内部集成栅极电路。我们设计了一个电路，利用电容将空穴释放到{p}$ -GaN层，以减轻阈值电压偏移，从而提高{p}$ -GaN栅极的稳定性。通过脉冲 I-V 测量和正偏压温度不稳定性 (PBTI) 测试，栅极区的载流子传输行为在 5 V 栅极偏压下达到了动态平衡。随着电压从 3 V 升至 8 V，观察到 0.4 V 的正栅极偏移 $(\ΔV_{\mathrm{TH}})$；外部电容放电释放应力后，$\ΔV_{\mathrm{TH}}$ 开始平稳下降。最后，建议采用集成无源元件和 ${p}$ -GaN 栅极 HEMT 电路来缓解 E 模式 HEMT 的 $V_{mathrm{ TH}}$ 不稳定性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology

CiteScore

5.20

自引率

4.30%

发文量

124

审稿时长

9 weeks

期刊介绍： The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.