Unsupervised Learning in a Ternary SNN Using STDP

IF 2 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Abhinav Gupta;Sneh Saurabh
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Abstract

This paper proposes a novel implementation of a ternary Spiking Neural Network (SNN) and investigates it using a hierarchical simulation framework. The proposed ternary SNN is trained in an unsupervised manner using the Spike Timing Dependent Plasticity (STDP) learning rule. A ternary neuron is implemented using a Dual-Pocket Tunnel Field effect transistor (DP-TFET). The synapse consists of a Magnetic Tunnel Junction (MTJ) with a Heavy Metal (HM) underlayer, allowing for the adjustment of its conductance by directing a current through the HM layer. Further, we show that a pair of dual-pocket Fully-Depleted Silicon-on-Insulator (FD-SOI) MOSFETs can be utilized to generate a current, which reduces exponentially with increasing duration of firing events between pre- and post-synaptic neurons. This current modulates the synapse’s conductance according to STDP. Furthermore, it is demonstrated that the proposed ternary SNN can be trained to classify digits in the MNIST dataset with an accuracy of 82%, which is better (75%) than that obtained using a binary SNN. Moreover, the runtime required to train the proposed ternary SNN is $8\times $ less than that required for a binary SNN.
使用 STDP 在三元 SNN 中进行无监督学习
本文提出了一种新颖的三元尖峰神经网络(SNN)实现方法,并使用分层模拟框架对其进行了研究。所提出的三元尖峰神经网络采用尖峰时序相关可塑性(STDP)学习规则,以无监督方式进行训练。三元神经元使用双插槽隧道场效应晶体管 (DP-TFET) 实现。突触由带有重金属(HM)底层的磁隧道结(MTJ)组成,可以通过引导电流通过重金属层来调整其电导。此外,我们还展示了一对双插槽全耗尽绝缘体上硅(FD-SOI)MOSFET 可用于产生电流,该电流随着突触前后神经元之间发射事件持续时间的增加而呈指数减少。该电流根据 STDP 调节突触的电导。此外,实验证明,所提出的三元 SNN 经过训练后可以对 MNIST 数据集中的数字进行分类,准确率达到 82%,比使用二元 SNN 所获得的准确率(75%)要高。此外,训练拟议的三元 SNN 所需的运行时间比二元 SNN 少 8 倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Journal of the Electron Devices Society
IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology
CiteScore
5.20
自引率
4.30%
发文量
124
审稿时长
9 weeks
期刊介绍: The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.
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