OCCAM: An Error Oblivious CAM

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Yuval Harary;Paz Snapir;Eyal Reshef;Esteban Garzón;Leonid Yavits
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引用次数: 0

Abstract

Content addressable memories (CAMs) are widely used in many applications in general purpose computer microarchitecture, networking and domain-specific hardware accelerators. In addition to storing and reading data, CAMs enable simultaneous compare of query datawords with the entire memory content. Similar to SRAM and DRAM, CAMs are prone to errors and faults. While error correcting codes (ECCs) are widely used in DRAM and SRAM, they are not directly applicable in CAM: if a dataword that is supposed to match a query altered due to an error, it will falsely mismatch even if it is ECC-encoded. We propose OCCAM, an error oblivious CAM, which combines ECC and approximate search (matching) to allow tolerating a large and dynamically configurable number of errors. We manufactured the OCCAM silicon prototype using 65-nm commercial process and verified its error tolerance capabilities through silicon measurements. OCCAM tolerates 11% error rate (7 bit errors in each 64-bit memory row) with 100% sensitivity and specificity.
OCCAM:忽略错误的 CAM
内容可寻址存储器(CAM)广泛应用于通用计算机微体系结构、网络和特定领域硬件加速器的许多应用中。除了存储和读取数据外,CAM 还能同时将查询数据字与整个存储器内容进行比较。与 SRAM 和 DRAM 类似,CAM 也容易出现错误和故障。虽然纠错码 (ECC) 广泛应用于 DRAM 和 SRAM,但并不能直接用于 CAM:如果与查询匹配的数据字因错误而发生变化,即使经过 ECC 编码,也会出现错误的不匹配。我们提出的 OCCAM 是一种忽略错误的 CAM,它结合了 ECC 和近似搜索(匹配),允许容忍大量可动态配置的错误。我们采用 65 纳米商用工艺制造了 OCCAM 硅原型,并通过硅测量验证了其容错能力。OCCAM 可容忍 11% 的错误率(每行 64 位内存中 7 位错误),灵敏度和特异性均为 100% 。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
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