Single Pulse Charge Pumping Technique Improvement for Interface-States Profiling in the Channel of MOSFET Devices

IF 2.5 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
DhiaElhak Messaoud;Boualem Djezzar;Mohamed Boubaaya;Abdelmadjid Benabdelmoumene;Boumediene Zatout;Amel Chenouf;Abdelkader Zitouni
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引用次数: 1

Abstract

This paper presents the separated single pulse charge pumping (SSPCP) technique, an improvement over conventional single pulse charge pumping (CSPCP) for analyzing metal oxide semiconductor field-effect transistor (MOSFET) degradation. SSPCP separates the measurement of source and drain currents $({I}_{ {s}}$ and ${I}_{ {d}}$ ), enabling the localization of interface traps $({N}_{ {it}})$ near these regions. Experimental validation shows that SSPCP achieves comparable results to CSPCP with a maximum measurement error of 5%. The technique is particularly useful for studying stress-induced localized degradation profiling, allowing for the exploration of non-uniform stress (e.g., hot-carrier injection) and uniform stress (e.g., negative bias temperature instability) in transistors with short channels. SSPCP effectively analyzes localized degradation and identifies differences in stress-induced degradation between the source and drain regions, making it a valuable tool in semiconductor device characterization.
单脉冲电荷泵送技术在MOSFET器件通道中接口状态分析中的改进
本文提出了分离单脉冲电荷泵送(SSPCP)技术,这是对传统单脉冲电荷泵送(CSPCP)技术的改进,用于分析金属氧化物半导体场效应晶体管(MOSFET)的退化。SSPCP将源极和漏极电流的测量$({I}_{{s}}$和${I}_{{d}}$)分开,使接口陷阱$({N}_{{it}})$在这些区域附近定位。实验验证表明,SSPCP的测量结果与CSPCP相当,最大测量误差为5%。该技术对于研究应力诱导的局部退化剖面特别有用,允许探索短通道晶体管中的非均匀应力(例如,热载流子注入)和均匀应力(例如,负偏置温度不稳定性)。SSPCP有效地分析了局部退化,并识别了源极和漏极区域之间应力诱导退化的差异,使其成为半导体器件表征的重要工具。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Transactions on Device and Materials Reliability
IEEE Transactions on Device and Materials Reliability 工程技术-工程:电子与电气
CiteScore
4.80
自引率
5.00%
发文量
71
审稿时长
6-12 weeks
期刊介绍: The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.
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